tag: UMC

Week In Review: Manufacturing, Test
By Mark LaPedus - 13 Aug, 2021 - Comments: 0

Chipmakers and OEMs Samsung has announced its latest foldable smartphones--the Galaxy Z Fold3 5G and Galaxy Z Flip3 5G. The systems are based on Samsung’s 5nm application processor. One system is the company’s most affordable foldable phone. The Galaxy Z Fold3 is $1,799.99, while the Galaxy Z Flip3 is $999.99. Samsung also announced two smartwatches—the Galaxy Watch4 and Galaxy Watch4... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 30 Jul, 2021 - Comments: 0

Chipmakers Intel has outlined its new process technology roadmap with plans to regain the leadership position in the market. As part of the move, Intel has changed the way it designates the nodes, revealed its new gate-all-around (GAA) transistor, and disclosed a customer for the GAA technology--Qualcomm. And not to be outdone, Intel has broadened its packaging portfolio. Intel is changing ... » read more

Intel/GF deal: Pros, Cons, Unknowns
By Mark LaPedus - 22 Jul, 2021 - Comments: 1

The industry is still buzzing over a Wall Street Journal report that Intel is in talks to acquire GlobalFoundries (GF) for $30 billion. It’s been a week since the report appeared. Intel is still mum. GF says there are no talks taking place. Regardless, it’s worth looking at all of the possible scenarios just in case, and the pros and cons involved. There are layers upon layers of iron... » read more

Chip Shortages Grow For Mature Nodes
By Mark LaPedus - 22 Jul, 2021 - Comments: 0

The current wave of chip shortages is expected to last for the foreseeable future, particularly for a growing list of critical devices produced in mature process nodes. Chips manufactured at mature nodes typically fall under the radar, but they are used in nearly every electronic device, including appliances, cars, computers, displays, industrial equipment, smartphones, and TVs. Many of thes... » read more

Innovative Dual Mark Design For Alignment Verification And Process Monitoring In Advanced Lithography
By UMC - 21 Jul, 2021 - Comments: 0

Improving on product overlay is one of the key challenges when shrinking technology nodes in semiconductor manufacturing. . . . With smart placement of alignment mark pairs in the X and Y direction, it is possible to determine intra-wafer distortion wafer-by-wafer. Both the measurement and modeled results are applied directly as a feed-forward correction to enable wafer level control. In this p... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 16 Jul, 2021 - Comments: 0

Chipmakers The chip industry is buzzing over a Wall Street Journal report that Intel is in talks to buy GlobalFoundries (GF) for $30 billion. In March, Intel re-entered the foundry business, positioning itself against Samsung and TSMC at the leading edge, and against a multitude of foundries working at older nodes. Intel planned to jumpstart its foundry business within its own fabs. But it... » read more

Week In Review: Design, Low Power
By Jesse Allen - 16 Jul, 2021 - Comments: 0

Tools Andes Technology certified Imperas reference models for the complete range of Andes IP cores with the new RISC-V P SIMD/DSP extension. The reference models can be used to evaluate multicore design configuration options for SoC architecture exploration and support early software development before silicon prototypes are available. Cadence's digital full flow was optimized and certified... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 16 Jul, 2021 - Comments: 0

Security A new security annotation standard for hardware IP is now available for download at no cost. The board of directors of the Accellera Systems Initiative, the non-profit EDA- and IP-standards organization, approved the release of the Security Annotation for Electronic Design Integration (SA-EDI) Standard 1.0. The standard, developed by Accellera’s IP Security Assurance (IPSA) Working ... » read more

Bumps Vs. Hybrid Bonding For Advanced Packaging
By Mark LaPedus - 23 Jun, 2021 - Comments: 3

Advanced packaging continues to gain steam, but now customers must decide whether to design their next high-end packages using existing interconnect schemes or move to a next-generation, higher-density technology called copper hybrid bonding. The decision is far from simple, and in some cases both technologies may be used. Each technology adds new capabilities in next-generation advanced pac... » read more

Fan-Out Packaging Options Grow
By Mark LaPedus - 17 Jun, 2021 - Comments: 0

Chipmakers, OSATs and R&D organizations are developing the next wave of fan-out packages for a range of applications, but sorting out the new options and finding the right solution is proving to be a challenge. Fan-out is a way to assemble one or more dies in an advanced package, enabling chips with better performance and more I/Os for applications like computing, IoT, networking and sma... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy