tag: UMC

The Week In Review: Manufacturing
By Mark LaPedus - 23 Dec, 2016 - Comments: 0

Chipmakers TDK has agreed to acquire MEMS supplier InvenSense for cash at an acquisition price of $13.00 per share, for a total acquisition price of $1.3 billion. Cypress has begun volume shipments of microcontrollers (MCUs) based on its 40nm Embedded Charge-Trap (eCT) flash technology. The MCUs are made on a foundry basis at UMC. UMC’s technology is a 40nm low power (40LP) logic process.... » read more

Foundries See Mixed Future
By Mark LaPedus - 21 Dec, 2016 - Comments: 1

Amid a tumultuous business environment, the silicon foundry industry is projected to see steady growth in a number of process segments in 2017. As in past years, the foundry market is expected to grow faster than the overall IC industry in 2017. But at the same time, the IC industry—the foundry customer base—continues to witness a frenetic wave of merger and acquisition activity. Basical... » read more

Uncertainty Grows For 5nm, 3nm
By Mark LaPedus - 19 Dec, 2016 - Comments: 4

As several chipmakers ramp up their 10nm finFET processes, with 7nm just around the corner, R&D has begun for 5nm and beyond. In fact, some are already moving full speed ahead in the arena. [getentity id="22586" comment="TSMC"] recently announced plans to build a new fab in Taiwan at a cost of $15.7 billion. The proposed fab is targeted to manufacture TSMC’s 5nm and 3nm processes, whic... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 16 Dec, 2016 - Comments: 0

Chipmakers Samsung is mulling over a plan to reorganize its System LSI division, according to a report from BusinessKorea. As part of the move, Samsung is mulling over the idea to spin off its foundry unit, according to the report. A spokeswoman for Samsung’s foundry unit said: “We don't have any comments on this story.” GlobalFoundries has added eight new partners to its FDXcelera... » read more

BEOL Issues At 10nm And 7nm (Part 1)
By Ed Sperling - 15 Dec, 2016 - Comments: 5

Semiconductor Engineering sat down to discuss problems with the back end of line at leading-edge nodes with Craig Child, senior manager and deputy director for [getentity id="22819" e_name="GlobalFoundries'"] advanced technology development integration unit; Paul Besser, senior technology director at [getentity id="22820" comment="Lam Research"]; David Fried, CTO at [getentity id="22210" e_name... » read more

40nm Technology Reinvigorated
By Steve Sharp - 15 Dec, 2016 - Comments: 0

When selecting a foundry process for mobile consumer focused products, chip designers are considering the economics of the solution just as much as the technical specifications. Using the latest and greatest finFET process might get you performance headroom above your spec, but could cost significantly more than using a more established, proven process. Today’s 40nm CMOS processes have bee... » read more

BEOL Barricades Ahead
By David Fried - 15 Dec, 2016 - Comments: 0

Coventor recently assembled an expert panel at IEDM 2016, to discuss changes to BEOL process technology that would be needed to continue dimensional scaling to 7 nm and lower. Among the questions posed to panelists: What is BEOL? Where does it begin and end? Are there fundamental limits to interconnect processes? How much longer can we continue to use current interconnect processes and ... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 02 Dec, 2016 - Comments: 0

Manufacturing There are more changes at SEMI. SEMI has named David Anderson as president of the SEMI Americas region. Most recently, Anderson was chief executive and chairman of Novati, a specialty manufacturing fab. He replaces Karen Savala, who was president of the SEMI Americas region for six years. In an e-mail, Savala confirmed she left SEMI in October. Meanwhile, in October, SEMI an... » read more

Multi-Patterning Issues At 7nm, 5nm
By Ed Sperling - 28 Nov, 2016 - Comments: 13

Continuing to rely on 193nm immersion lithography with multiple patterning is becoming much more difficult at 7nm and 5nm. With the help of various resolution enhancement techniques, optical lithography using a deep ultraviolet excimer laser has been the workhorse patterning technology in the fab since the early 1980s. It is so closely tied with the continuation of [getkc id="74" comment="Mo... » read more

Can We Measure Next-Gen FinFETs?
By Mark LaPedus - 21 Nov, 2016 - Comments: 6

After ramping up their respective 16nm/14nm finFET processes, chipmakers are moving towards 10nm and/or 7nm, with 5nm in R&D. But as they move down the process roadmap, they will face a new set of fab challenges. In addition to lithography and interconnects, there is metrology. Metrology, the science of measurements, is used to characterize tiny films and structures. It helps to boost yi... » read more

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