tag: University of California Berkeley

Chip Industry’s Technical Paper Roundup: June 27
By Liz Allan - 27 Jun, 2023 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=113 /]   » read more

All-Silicon Quantum Light Source Based On A Single Atomic Emissive Center
By Technical Paper Link - 24 Jun, 2023 - Comments: 0

A technical paper titled “All-silicon quantum light source by embedding an atomic emissive center in a nanophotonic cavity” was published by researchers at University of California Berkeley and Lawrence Berkeley National Laboratory. Abstract: "Silicon is the most scalable optoelectronic material but has suffered from its inability to generate directly and efficiently classical or quantum ... » read more

Chip Industry’s Technical Paper Roundup: June 13
By Liz Allan - 13 Jun, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=109 /] Further Reading Technical Paper Home » read more

Research Bits: May 2
By Jesse Allen - 02 May, 2023 - Comments: 0

Reconfigurable FeHEMT Researchers at the University of Michigan created a reconfigurable ferroelectric transistor that could enable a single amplifier to do the work of multiple conventional amplifiers. “By realizing this new type of transistor, it opens up the possibility for integrating multifunctional devices, such as reconfigurable transistors, filters and resonators, on the same plat... » read more

Research Bits: Dec. 20
By Susan Rambo - 20 Dec, 2022 - Comments: 0

Patch tracks blood in deep tissue A skin-worn photoacoustic patch developed by a research team at the University of California San Diego is equipped with arrays of laser diodes and piezoelectric transducers to detect biomolecules in deep tissues, which usually would require a magnetic resonance imaging (MRI) and X-ray-computed tomography. The patch may help doctors tract hemoglobin in real tim... » read more

Research Bits: Nov. 15
By Jesse Allen - 15 Nov, 2022 - Comments: 0

Low temperature 3D bonding Scientists from Osaka University developed a new method for the direct three-dimensional bonding of copper electrodes using silver layers. The method works at low temperatures and does not require external pressure. "Our process can be performed under gentle conditions, at relatively low temperatures and without added pressure, but the bonds were able to withstand... » read more

Research Bits: Oct. 4
By Jesse Allen - 04 Oct, 2022 - Comments: 0

2D electrode for ultra-thin semiconductors Researchers from the Korea Institute of Science and Technology (KIST), Japan's National Institute for Materials Science, and Kunsan National University designed two-dimensional semiconductor-based electronic and logic devices, with electrical properties that can be selectively controlled through a new 2D electrode material, chlorine-doped tin diseleni... » read more

Research Bits: Sept. 20
By Jesse Allen - 20 Sep, 2022 - Comments: 0

Multi-mode memristors Researchers from ETH Zurich, the University of Zurich, and Empa built a new memristor that can operate in multiple modes and could potentially be used to mimic neurons in more applications. “There are different operation modes for memristors, and it is advantageous to be able to use all these modes depending on an artificial neural network’s architecture,” said R... » read more

Research Bits: July 11
By Jesse Allen - 11 Jul, 2022 - Comments: 0

Modeling ALE Scientists at U.S. Department of Energy’s (DOE) Princeton Plasma Physics Laboratory (PPPL), in coordination with Lam Research, modeled atomic layer etching (ALE) for semiconductor fabrication. “This would be one little piece in the whole process,” said David Graves, associate laboratory director for low-temperature plasma surface interactions at PPPL and a professor in th... » read more

Power/Performance Bits: Aug. 24
By Jesse Allen - 24 Aug, 2021 - Comments: 0

Low power AI Engineers at the Swiss Center for Electronics and Microtechnology (CSEM) designed an SoC for edge AI applications that can run on solar power or a small battery. The SoC consists of an ASIC chip with RISC-V processor developed at CSEM along with two tightly coupled machine-learning accelerators: one for face detection, for example, and one for classification. The first is a bin... » read more

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