Chip Industry’s Technical Paper Roundup: Apr. 18

New technical papers recently added to Semiconductor Engineering’s library: [table id=93 /]   If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involv... » read more

Vertical Nanowire Gate-All-Around FETs based on the GeSn-Material System Grown on Si

A new technical paper titled "Vertical GeSn nanowire MOSFETs for CMOS beyond silicon" was published by researchers at Peter Grünberg Institute 9, JARA, RWTH Aachen University, CEA, LETI, University of Grenoble Alpes, University of Leeds, and IHP. "Here, we present high performance, vertical nanowire gate-all-around FETs based on the GeSn-material system grown on Si. While the p-FET transcon... » read more

System Bits: Nov. 29

Qubit device fabbed in standard CMOS In a major step toward commercialization of quantum computing, Leti, an institute of CEA Tech, along with Inac, a fundamental research division of CEA, and the University of Grenoble Alpes have achieved the first demonstration of a quantum-dot-based spin qubit using a device fabricated on a 300-mm CMOS fab line. Maud Vinet, Leti’s advanced CMOS manager... » read more