Security Research: Technical Paper Round-up


A number of hardware security-related technical papers were presented at the August 2023 USENIX Security Symposium. Here are some highlights with associated links. [table id=130 /] A complete listing of all papers presented at this summer's USENIX conference can be found here and here. The organization provides open access research, and the presentation slides and papers are free to the p... » read more

Modeling and Testing Microarchitectural Leakage of CPU Exceptions (Microsoft, Vrije Universiteit Amsterdam)


A new technical paper titled "Speculation at Fault: Modeling and Testing Microarchitectural Leakage of CPU Exceptions" was published by researchers at Microsoft and Vrije Universiteit Amsterdam. This paper was included at the recent 32nd USENIX Security Symposium. Abstract: "Microarchitectural leakage models provide effective tools to prevent vulnerabilities such as Spectre and Meltdown vi... » read more

Microarchitectural Side-Channel Attacks And Defenses on NVRAM DIMMs


A new technical paper titled "NVLeak: Off-Chip Side-Channel Attacks via Non-Volatile Memory Systems" was published by researchers at UC San Diego, Purdue University, and UT Austin. This paper was included at the recent 32nd USENIX Security Symposium. Abstract: "We study microarchitectural side-channel attacks and defenses on non-volatile RAM (NVRAM) DIMMs. In this study, we first perform r... » read more

Physical Removal Attack On LiDAR Sensors And Mitigation Strategies


A technical paper titled "You Can't See Me: Physical Removal Attacks on LiDAR-based Autonomous Vehicles Driving Frameworks" was published by researchers at University of Michigan, University of Florida and the University of Electro-Communications (Japan). This paper was included at the recent 32nd USENIX Security Symposium. Abstract: "Autonomous Vehicles (AVs) increasingly use LiDAR-base... » read more

Remote Direct Memory Introspection (Rice, Duke, MIT)


A technical paper titled "Remote Direct Memory Introspection" was published by researchers at Rice University, Duke University, and MIT. This paper won a distinguished paper award at the recent 32nd USENIX Security Symposium. Abstract: "Hypervisors have played a critical role in cloud security, but they introduce a large trusted computing base (TCB) and incur a heavy performance tax. As of... » read more

Security Research: Technical Paper Round-Up


A number of hardware security-related technical papers were presented at recent conferences, including the August 2022 USENIX Security Symposium and IEEE’s International Symposium on Hardware Oriented Security and Trust (HOST). Topics include side-channel attacks and defenses (including on-chip mesh interconnect attacks), heterogeneous attacks on cache hierarchies, rowhammer attacks and mitig... » read more

PTAuth: Temporal Memory Safety via Robust Points-to Authentication


Authors: Reza Mirzazade Farkhani, Mansour Ahmadi, and Long Lu, Northeastern University Abstract: "Temporal memory corruptions are commonly exploited software vulnerabilities that can lead to powerful attacks. Despite significant progress made by decades of research on mitigation techniques, existing countermeasures fall short due to either limited coverage or overly high overhead. Further... » read more

Database Reconstruction from Noisy Volumes: A Cache Side-Channel Attack on SQLite


Authors: Aria Shahverdi, University of Maryland; Mahammad Shirinov, Bilkent University; Dana Dachman-Soled, University of Maryland Abstract: "We demonstrate the feasibility of database reconstruction under a cache side-channel attack on SQLite. Specifically, we present a Flush+Reload attack on SQLite that obtains approximate (or "noisy") volumes of range queries made to a private database... » read more

SMASH: Synchronized Many-sided Rowhammer Attacks from JavaScript


Authors: Finn de Ridder, ETH Zurich and VU Amsterdam; Pietro Frigo, Emanuele Vannacci, Herbert Bos, and Cristiano Giuffrida, VU Amsterdam; Kaveh Razavi, ETH Zurich Abstract: "Despite their in-DRAM Target Row Refresh (TRR) mitigations, some of the most recent DDR4 modules are still vulnerable to many-sided Rowhammer bit flips. While these bit flips are exploitable from native code, tri... » read more

Usability of Authenticity Checks for Hardware Security Tokens


Abstract:  "The final responsibility to verify whether a newly purchased hardware security token (HST) is authentic and unmodified lies with the end user. However, recently reported attacks on such tokens suggest that users cannot take the security guarantees of their HSTs for granted, even despite widely deployed authenticity checks. We present the first comprehensive market review eva... » read more