Extending The Benefits Of UVM To Include AMS: An Update On Accellera’s UVM-AMS Standard Development

By Tom Fitzpatrick - 04 Oct, 2022 - Comments: 0

By Tom Fitzpatrick and Peter Grove SoC teams can be divided up into design and verification groups. For digital designs, the Universal Verification Methodology (UVM), initially developed by Accellera and now standardized as IEEE 1800.2, has been the industry standard for the past decade. Since most SoC designs also have analog and mixed-signal IP blocks, it would be ideal for verification en... » read more

Standard Evolution

By Brian Bailey - 26 Mar, 2020 - Comments: 0

I recently had the opportunity to sit down with Lu Dai, chairman of Accellera Systems Initiative and senior director of engineering for Qualcomm. SE: I have noticed a change in the way that Accellera operates these days. In the past, standards were driven by the EDA companies, but recently we have seen a lot more end-user company involvement and they are the companies driving new standards. ... » read more

Week In Review: Design, Low Power

By Jesse Allen - 22 Nov, 2019 - Comments: 1

Accellera formed the Universal Verification Methodology Analog/Mixed-Signal Working Group (UVM-AMS WG), which will work to develop a standard that will provide a unified analog/mixed-signal verification methodology based on UVM to improve the verification of AMS integrated circuits and systems. “Our objective is to standardize a method to drive and monitor analog/mixed-signal nets within UVM,... » read more

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Extending The Benefits Of UVM To Include AMS: An Update On Accellera’s UVM-AMS Standard Development

Standard Evolution

Week In Review: Design, Low Power

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