Reducing The Expertise Required For Software Developers To Participate In Chip Creation (USC)


A new technical paper titled "A Vertically Integrated Framework for Templatized Chip Design" was published by researchers at University of Southern California. Abstract "Developers who primarily engage with software often struggle to incorporate custom hardware into their applications, even though specialized silicon can provide substantial benefits to machine learning and AI, as well as ... » read more

3D IC: Opportunities, Challenges, And Solutions


Nearly every big city reaches a point in its evolution when it runs out of open space and starts building vertically. This enables far more apartments, offices and people per square mile, while avoiding the increased infrastructure costs of suburban sprawl. Semiconductors are evolving in much the same way. Moore’s Law is slowing, and adoption of new advanced technology nodes is slowing as wel... » read more

Avoiding A $7.7B Chip Design Cost


For years, the story about semiconductor development cost and about EDA contributions has been pretty simple. Cost has been, is, and will likely be for a while, the single biggest issue in scaling development for more complex designs. The next big leap for verification productivity will be the close integration of verification and design engines, both vertically and horizontally as I have writt... » read more