tag: Virage Logic

Buying And Selling EDA Companies
By Ed Sperling - 24 Oct, 2013 - Comments: 0

EDA, arguably more than any other industry, has been built on the backs of engineering breakthroughs by startups. In aggregate, those startups are the backbone of tools that have made cell phones smart and which helped improved gas mileage on automobiles. Through an almost continuous stream of acquisitions, these startups have added to the top-line valuation of big EDA companies, and despite th... » read more

Experts At The Table: Nice To Have Vs. Need To Have
By Ed Sperling - 10 Jun, 2013 - Comments: 0

Low-Power Engineering sat down to discuss what’s essential and what isn’t in EDA with Brani Buric, executive vice president at Virage Logic; Kalar Rajendiran, senior director of marketing at eSilicon; Mike Gianfagna, vice president of marketing at Atrenta, and Oz Levia, vice president of marketing and business development at Springsoft. What follows are excerpts of that conversation. LPE... » read more

Leveraging The Past
By Ed Sperling - 28 Jun, 2012 - Comments: 0

By Ann Steffora Mutschler It’s easy to forget that not every design today is targeted at 20nm, given the amount of focus put on the bleeding edge of technology. But in fact a large number of designs utilize the stability and reliability of older manufacturing nodes, as well as lower mask costs, by incorporating new design and verification techniques, with 2.5D designs being a prime example. ... » read more

ARM’s Race
By Ed Sperling - 05 Nov, 2010 - Comments: 0

Prior to the Synopsys acquisition of Virage Logic, Synopsys seemed to have an almost exclusive relationship with ARM. Since then, Cadence and Mentor Graphics have both been cutting deals with ARM for support of its IP cores. What’s changed? With regard to the Virage Logic acquisition, very little. Synopsys did acquire the ARC processor through that deal, but ARC had been much more focused ... » read more

What’s In The Package?
By Ed Sperling - 09 Sep, 2010 - Comments: 0

By Ann Steffora Mutschler The growing market for smart mobile devices and high-performance processors requiring more than 2GHz of processing power is driving IP providers to do even more work to prepare their IP offerings for customers. This theme was reflected at last week’s GlobalFoundries Global Technology Conference when the company’s senior VP of technology and R&D Gregg Bartle... » read more

Experts At The Table: The Trouble With Corners
By Ed Sperling - 09 Sep, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss corners with PV Srinivas, senior director of engineering at Mentor Graphics; Dipesh Patel, vice president of engineering for physical IP at ARM; Lisa Minwell, director of technical marketing at Virage Logic; and Jim McCanny, CEO of Altos Design Automation. What follows are excerpts of that conversation. LPE: As we get to 22nm we’re... » read more

Experts At The Table: The Trouble With Corners
By Ed Sperling - 27 Aug, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss corners with PV Srinivas, senior director of engineering at Mentor Graphics; Dipesh Patel, vice president of engineering for physical IP at ARM; Lisa Minwell, director of technical marketing at Virage Logic; and Jim McCanny, CEO of Altos Design Automation. What follows are excerpts of that conversation. LPE: How does software affect ... » read more

Can IP Be Standardized In Low-Power Designs?
By Ed Sperling - 12 Aug, 2010 - Comments: 0

By Ann Steffora Mutschler SoC designers are beginning to embrace low power formats UPF (IEEE P1801) and the Common Power Format (CPF) to express power intent, but are these efforts enough to create standardized IP in low power designs? Mike Brogley, IP and solutions product marketing manager at Actel, believes it is possible. “Yes, IP can be standardized, but the main driver in low-pow... » read more

Experts At The Table: The Trouble With Corners
By Ed Sperling - 12 Aug, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss corners with PV Srinivas, senior director of engineering at Mentor Graphics; Dipesh Patel, vice president of engineering for physical IP at ARM; Lisa Minwell, director of technical marketing at Virage Logic; and Jim McCanny, CEO of Altos Design Automation. What follows are excerpts of that conversation. LPE: Corners appears to be get... » read more

Getting Low-Power IP Integration Right
By Ed Sperling - 08 Jul, 2010 - Comments: 0

By Ann Steffora Mutschler When it comes to integrating multivendor IP, power concerns dominate the challenges that engineers face. To get it right however, there are definitely questions that should be asked when considering which IP to use, along with techniques to manage power complexity. When choosing IP, the following points should be considered: How mature is the IP being sold? Has... » read more

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