tag: Vista Ventures

Verification And The IoT
By Ed Sperling - 31 May, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss what impact the IoT will have on the design cycle, with Christopher Lawless, director of external customer acceleration in [getentity id="22846" e_name="Intel"]'s Software Services Group; David Lacey, design and verification technologist at Hewlett Packard Enterprise; Jim Hogan, managing partner at Vista Ventures; Frank Schirrmeister, senior group d... » read more

Verification And The IoT
By Ed Sperling - 04 May, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss what impact the IoT will have on the design cycle, with Christopher Lawless, director of external customer acceleration in [getentity id="22846" e_name="Intel"]'s Software Services Group; David Lacey, design and verification technologist at Hewlett Packard Enterprise; Jim Hogan, managing partner at Vista Ventures; Frank Schirrmeister, senior group d... » read more

Betting On Power And Deep Learning
By Ed Sperling - 13 Oct, 2016 - Comments: 0

Jim Hogan, managing partner of Vista Ventures, sat down with Semiconductor Engineering to talk about what investments deliver the biggest returns, how quickly, and why there are so few investors in some big growth areas. What follows are excerpts of that conversation. SE: What are you investing in these days and why? Hogan: I have about 15 active deals right now. I generally invest in thi... » read more

Joint R&D Has Its Ups And Downs
By Jeff Dorsch - 07 Sep, 2016 - Comments: 0

As corporate spending on research and development dwindles, enterprises are reaching out to colleges and universities to supplement their R&D. And they often are finding eager partners in those endeavors, as professors and their graduate students look for help, financial and technical, in addressing long-term research projects. “Pure research is just a luxury no one can afford anymore,... » read more

The Mightier Microcontroller
By Ed Sperling - 26 May, 2016 - Comments: 1

Microcontrollers are becoming more complex, more powerful, and significantly more useful, but those improvements come with strings attached. While it's relatively straightforward to develop multi-core microcontroller (MCU) hardware with advanced power management features, it's much more difficult to write software for these chips because memory is limited. CPUs can use on-chip memory such as... » read more

IP Business Models In Flux
By Ann Mutschler - 12 May, 2016 - Comments: 0

EDA and IP suppliers are engaging with foundries earlier with each manufacturing process node, while those foundries are providing ever more optimized and tuned processes to their customers. As part of this, IP providers must port their IP offerings to the various foundries and processes, putting a squeeze on resources. That raises some difficult questions, such as how to prioritize their li... » read more

Rethinking Processor Architectures
By Ed Sperling - 05 May, 2016 - Comments: 2

The semiconductor industry's obsession with clock speeds, cores and how many transistors fit on a piece of silicon may be nearing an end for real this time. The [getentity id="22048" comment="IEEE"] said it will develop the International Roadmap for Devices and Systems (IRDS), effectively setting the industry agenda for future silicon benchmarking and adding metrics that are relevant to specifi... » read more

Buying And Selling EDA Companies
By Ed Sperling - 22 Aug, 2013 - Comments: 0

By Ed Sperling The rule of thumb for mergers and acquisitions is that the majority will fail. So why, despite concerns about big companies buying up the tools of startups, does EDA’s track record look so good? There are a number of answers that are unique to the EDA industry: There is no manufacturing that needs to be absorbed by the acquirer, which greatly simplifies any deal. Sale... » read more

Bringing Electrical Info To Design’s Forefront
By Ann Mutschler - 09 May, 2013 - Comments: 0

By Ann Steffora Mutschler To reflect the impact on transistors of smaller process nodes and the electrical effects that occur as a result, a shift is underway where the electrical analysis and verification that used to be done when the layout was complete is moving earlier in the design process. The analysis includes parasitic extraction of interconnect and device parasitics, electromigrati... » read more

3D Standards For The Real World
By Ed Sperling - 23 Feb, 2012 - Comments: 0

By Pallab Chatterjee Stacking die has progressed from what is technologically possible to what will be realistically feasible in a fabless or fab-lite world. The big challenges may be less about how to deal with stress caused by a TSV or thermal density and more about companies working together in a disaggregated supply chain. This was quite evident at a recent DesignCon panel dicussion on ... » read more

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