Silicon Photonics Manufacturing Ramps Up

By Gregory Haley - 21 Mar, 2024 - Comments: 0

Circuit scaling is starting to hit a wall as the laws of physics clash with exponential increases in the volume of data, forcing chipmakers to take a much closer look at silicon photonics as a way of moving data from where it is collected to where it is processed and stored. The laws of physics are immutable. Put simply, there are limits to how fast an electron can travel through copper. The... » read more

III–V Laser Grown on a Patterned Si Photonics Platform With Light Coupling Into Passive SiN Waveguides

By Technical Paper Link - 28 Jul, 2023 - Comments: 0

A technical paper titled “Unlocking the monolithic integration scenario: optical coupling between GaSb diode lasers epitaxially grown on patterned Si substrates and passive SiN waveguides” was published by researchers at University of Montpellier, Tyndall National Institute, Munster Technological University and Polytechnic University of Bari. Abstract: "Silicon (Si) photonics has recently... » read more

Making Silicon Photonics Chips More Reliable

By Ed Sperling - 09 Jun, 2020 - Comments: 0

Silicon photonics has the ability to dramatically improve on-die and chip-to-chip communication within a package at extremely low power, but ensuring that signal integrity remains consistent over time isn't so simple. While this technology has been used commercially for at least the past decade, it never has achieved mainstream status. That's mostly due to the fact that Moore's Law scaling h... » read more

Power/Performance Bits: Oct. 9

By Jesse Allen - 09 Oct, 2019 - Comments: 0

Topological insulator waveguides Engineers at the University of Pennsylvania and Polytechnic University of Milan applied topological insulators to photonic chips to make reconfigurable waveguides. In topological insulators, charged particles can flow freely on the material's edges but can't pass through the interior. For photonics, topological insulators with edges that could be redefined m... » read more

Power/Performance Bits: Aug. 14

By Jesse Allen - 14 Aug, 2018 - Comments: 1

All-optical logic Researchers from Aalto University developed multifunction all-optical logic gates using a network of nanowires. To build the nanostructure, the team assembled two different semiconductor nanowires, indium phosphide and aluminum gallium arsenide. The nanowires have a unique one-dimensional structure, which allows them to function like nanosized antennas for light. Using ... » read more

Power/Performance Bits: Aug. 7

By Jesse Allen - 07 Aug, 2018 - Comments: 0

Optical neural network Researchers at the National Institute of Standards and Technology (NIST) have made a silicon chip that distributes optical signals precisely across a miniature brain-like grid, showcasing a potential new design for neural networks. Using light would eliminate interference due to electrical charge and the signals would travel faster and farther, said the researchers. "... » read more

Integrated Photonics (Part 2)

By Brian Bailey - 06 Sep, 2017 - Comments: 1

Semiconductor Engineering sat down to discuss the status of integrated photonics with Twan Korthorst, CEO for PhoeniX Software; Gilles Lamant, distinguished engineer for [getentity id="22032" e_name="Cadence"]; Bill De Vries, director of marketing for Lumerical Solutions; and Brett Attaway, director of EPDA solutions at AIM Photonics, SUNY Polytechnic Institute. What follows are excerpts of tha... » read more

Silicon Photonics Comes Into Focus

By Ed Sperling - 31 Oct, 2016 - Comments: 5

Silicon photonics is attracting growing attention and investment as a companion technology to copper wiring inside of data centers, raising new questions about what comes next and when. Light has always been the ultimate standard for speed. It requires less energy to move large quantities of data, generates less heat than electricity, and it can work equally well over long or short distances... » read more

Visiting The Future At CLEO

By Marc David Levenson - 17 Jul, 2014 - Comments: 0

CLEO - The Conference on Lasers and Electro-Optics – presents the most comprehensive snapshot of laser and photonics applications. Presented by three professional societies (OSA, APS and IEEE Photonics) it was held in San Jose last month. While few of the topics covered are mainstream today for the semiconductor industry, one doesn’t have to look too far to find impact and potential synergi... » read more

Manufacturing Bits: Aug. 27

By Mark LaPedus - 27 Aug, 2013 - Comments: 0

Growing tubes Single-wall carbon nanotubes could one day be used in electronics, optoelectronics, biomedical imaging and other applications. But the synthesis of nanotubes with defined chiralities has been a stumbling block. A chiral molecule is a molecule that has a non-superposable mirror image. The University of Southern California has shown that chirality-pure short nanotubes can be use... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?