Week In Review: Design, Low Power

By Jesse Allen - 29 Jan, 2021 - Comments: 0

The CXL Consortium published the Compute Express Link 2.0 specification. CXL is an interconnect that maintains memory coherency between the CPU memory space and memory on attached devices. CXL 2.0 adds support for switching for fan-out to connect to more devices, memory pooling for increased memory utilization efficiency and providing memory capacity on demand, and support for persistent memory... » read more

What Happened To Execute-in-Place?

By Bryon Moyer - 25 Aug, 2020 - Comments: 0

Executing code directly from non-volatile memory, where it is stored, greatly simplifies compute architectures — especially for simple embedded devices like microcontrollers (MCUs). However, the divergence of memory and logic processes has made that nearly impossible today. The term “execute-in-place,” or ”XIP,” originated with the embedded NOR memory in MCUs that made XIP viable. ... » read more

Moving Data And Computing Closer Together

By Bryon Moyer - 09 Jul, 2020 - Comments: 2

The speed of processors has increased to the point where they often are no longer the performance bottleneck for many systems. It's now about data access. Moving data around costs both time and power, and developers are looking for ways to reduce the distances that data has to move. That means bringing data and memory nearer to each other. “Hard drives didn't have enough data flow to cr... » read more

What’s Next For NOR Flash?

By Mark LaPedus - 16 Feb, 2017 - Comments: 0

The flash memory market is the tale two of cities. Today, NAND and NOR are the two main flash memory types. Over the years, the NAND flash market has exploded. Targeted for data storage, NAND flash has moved into flash cards, solid-state storage drives (SSDs) and other products. The excitement for NAND continues to mount, as the technology is moving from planar to a 3D structure. In fact, 3D... » read more

The Week In Review: Design

By Jesse Allen - 20 Jan, 2017 - Comments: 0

Legal Back in 2013, Synopsys filed suit against ATopTech for copyright infringement. The courts found in favor of Synopsys and ATopTech was damages were set at a little over $30M. With appeals unsuccessful, ATopTech announced that it has filed a voluntary petition under Chapter 11 of the Bankruptcy Code and has filed a motion to sell its businesses using a stalking horse bidder (an initial b... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 16 Dec, 2016 - Comments: 0

Chipmakers Samsung is mulling over a plan to reorganize its System LSI division, according to a report from BusinessKorea. As part of the move, Samsung is mulling over the idea to spin off its foundry unit, according to the report. A spokeswoman for Samsung’s foundry unit said: “We don't have any comments on this story.” GlobalFoundries has added eight new partners to its FDXcelera... » read more

Battle Looms Over Mobile Payments

By Ernest Worthman - 03 Mar, 2016 - Comments: 0

The lines are drawn. The sides are sizing each other up. Apple is on one side with secure element, and Google and Microsoft are on the other side with host card emulation. Both are mobile payment systems for smartphones that rely on near-field communication technology. Apple fired the first shot with SE, and Google soon replied with HCE. And now both sides are ramping up after months of dela... » read more

The Week In Review: Design/IoT

By Jesse Allen - 25 Sep, 2015 - Comments: 0

M&A Dialog will acquire Atmel in a cash and stock transaction for total consideration of approximately $4.6 billion. Dialog anticipates achieving projected annual cost savings of $150 million within two years. The transaction is expected to close in the first quarter of calendar 2016. IP Synopsys announced a portfolio of IP optimized for the IoT, which includes power- and area-effi... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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