tag: X-ray metrology

3D Metrology Meets Its Match In 3D Chips And Packages
By Laura Peters - 11 Jun, 2024 - Comments: 0

The pace of innovation in 3D device structures and packages is accelerating rapidly, driving the need for precise measurement and control of feature height to ensure these devices are reliable and perform as expected throughout their lifetimes. Expansion along the z axis is already well underway. One need look no further than the staircase-like 3D NAND stacks that rise like skyscrapers to p... » read more

CDSAXS Milestones And Future Growth of X-ray-Based Metrology for 3D Nanostructures Important To Chip Industry
By Technical Paper Link - 20 Apr, 2023 - Comments: 0

A new technical paper titled "Review of the key milestones in the development of critical dimension small angle x-ray scattering at National Institute of Standards and Technology." Abstract: "An x-ray scattering based metrology was conceived over 20 years ago as part of a collaboration between National Institute of Standards and Technology (NIST) and International Business Machines Corporat... » read more

Week In Review: Manufacturing, Test
By Karen Heyman - 09 Dec, 2022 - Comments: 2

The more than 1,400 attendees at this week’s IEDM, which celebrated the 75th anniversary of the transistor, were clearly focused on making the next 75 years of semiconductors even more remarkable than the last. Intel, Samsung, TSMC, STMicroelectronics, GlobalFoundries and imec announced breakthrough devices, materials, and even integration approaches. These included: Intel showcased adva... » read more

Reliability Costs Becoming Harder To Track
By Ed Sperling And Susan Rambo - 08 Jun, 2021 - Comments: 0

Ensuring reliability in chips is becoming more complex and significantly more expensive, shifting left into the design cycle and right into the field. But those costs also are becoming more difficult to define and track, varying greatly from one design to the next based upon process node, package technology, market segment, and which fab or OSAT is used. As the number of options increases fo... » read more

Metrology Challenges For Gate-All-Around
By Mark LaPedus - 16 Apr, 2020 - Comments: 3

Metrology is proving to be a major challenge for those foundries working on processes for gate-all-around FETs at 3nm and beyond. Metrology is the art of measuring and characterizing structures in devices. Measuring and characterizing structures in devices has become more difficult and expensive at each new node, and the introduction of new types of transistors is making this even harder. Ev... » read more

X-ray Detects Hidden Failure Modes
By DELTA, a part of FORCE Technology - 11 Jun, 2019 - Comments: 0

Functional testing and visual examination using stereo microscopy are today's 'standard' quality control techniques for characterising yield and workmanship-related issues in IC fabrication and electronics assembly. Currently used test methodologies—such as IPC-TM-650—rely heavily on visual examination. The visual detection of defects can still be difficult, as samples need to be inspected ... » read more

Can We Measure Next-Gen FinFETs?
By Mark LaPedus - 21 Nov, 2016 - Comments: 6

After ramping up their respective 16nm/14nm finFET processes, chipmakers are moving towards 10nm and/or 7nm, with 5nm in R&D. But as they move down the process roadmap, they will face a new set of fab challenges. In addition to lithography and interconnects, there is metrology. Metrology, the science of measurements, is used to characterize tiny films and structures. It helps to boost yi... » read more

Manufacturing Bits: April 26
By Mark LaPedus - 26 Apr, 2016 - Comments: 0

Multi-beam inspection For some time, Singaporean startup Maglen has been developing a multi-beam e-beam inspection tool technology. Now, Maglen has reached two milestones. First, it has devised a full column test stand. The test stand includes a mechanical column and software. The second milestone is also significant. “We also dropped our beam and obtained our very first images,” sai... » read more

Measuring FinFETs Will Get Harder
By Mark LaPedus - 19 Nov, 2015 - Comments: 2

The industry is gradually migrating toward chips based on finFET transistors at 16nm/14nm and beyond, but manufacturing those finFETs is proving to be a daunting challenge in the fab. Patterning is the most difficult process for finFETs. But another process, metrology, is fast becoming one of the biggest challenges for the next-generation transistor technology. In fact, [getkc id="252" kc_n... » read more

Next-Gen Metrology: Searching For A Bright X-Ray Source
By SEMI - 21 May, 2015 - Comments: 0

By Debra Vogler Metrology for semiconductor applications is a broad topic regardless of whether one is talking about front-end-of-line (FEOL) or back-end-of-line (BEOL) technologies. Benjamin Bunday, project manager, CD Metrology and senior member of the technical staff at SEMATECH, broke down the topic of next-generation metrology at 10nm and below into four main categories for SEMI: • I... » read more

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