How to minimize the risk of hardware attacks in the shadow of Meltdown and Spectre.
Ben Levine, senior director of product management at Rambus, explains how to minimize the risk of attacks on chip hardware, why design for security is becoming more critical for connected devices, and strategies for making devices less vulnerable.
Interest in the open-source ISA marks a significant shift among chipmakers, but it will require continued industry support to be successful.
Slowdown due to impact on timing, and dependencies between power, thermal and timing that may not be caught by signoff tools.
Access to source code makes it attractive for custom applications, but gaps remain in the tool flow and in software.
SoC bandwidth, integration expand as data centers use more FPGAs for machine learning.
Problems won’t derail next-gen litho, but could limit use and affect schedules.
Costs of developing a complex chip could run as high as $1.5B, while power/performance benefits are likely to decrease.
AI-enabled systems are being designed to process more data locally as device scaling benefits decline.
Interest in the open-source ISA marks a significant shift among chipmakers, but it will require continued industry support to be successful.
Foundry forms ASIC subsidiary as it focuses on 14nm/12nm and above.
Technology has the potential to reshape processing everywhere, starting with limited scientific and commercial applications.
Market overcrowding, more efficient manufacturing, and growing list of scaling issues create a challenging competitive landscape.
Using the Von Neumann architecture for artificial intelligence applications is inefficient. What will replace it?
At least 5 technologies are in the running, with 3D XPoint leading the pack.
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