The Challenge And Value Proposition of eFPGA Emulation

Verifying that all the connections between the SoC and the eFPGA are correct.


More than 40 chips have been licensed to use EFLX eFPGA and more than 20 chips are already working in silicon. Big customers like Renesas are planning high volumes and families of chips using eFPGA.

eFPGA is being used in process nodes from 180nm to 5nm, with 3nm and 18A in evaluation.

Especially for the high-volume customers working in advanced finFET nodes, the strong need is for first time silicon success to meet schedules and budgets.

The value of eFPGA emulation

Our customers use eFPGA to handle changing standards, changing algorithms, evolving security needs and to customize their SoCs for different customer use cases.

Most customers doing SoCs on advanced finFET nodes want to prove out their design using emulation: they can thoroughly test the hardware for multiple use cases, run software on their emulated device for driver development, and achieve much faster run time than simulation.

Flex Logix has provided emulation models for eFPGAs for many years, supporting both Siemens Veloce and Cadence Palladium platforms.

Customers want to verify correct operation of the eFPGA in their SoC: to load the configuration and execute the eFPGA to verify that all the connections between the SoC and the eFPGA are correct.

Our emulation models support configuration loading, execution, and readback modes to ensure all functional modes and boot time operations are 100% correct. We also support DFT mode to rapidly verify loading, execution, and unloading of large sets of test patterns.

Flex Logix eFPGA can be delivered as just 1,000 LUTs or hundreds of thousands of LUTs (with millions in development). We can optimize the eFPGA to tune it for the customer needs – a networking customer typically just wants logic; a signal processing customer wants lots of DSP MACs; and most customers want Block RAM with different feature sets (for this we have a Reconfigurable BRAM that can be used as single port, two port and true dual port with built-in ECC and Parity options).

Our emulation models are parameterizable to be able to handle the full range of eFPGA varieties that we deliver.

The challenge of eFPGA emulation

All traditional FPGA chips and some eFPGA IP are based on full custom design solutions. This means they do not have a synthesizable RTL design that can be emulated.

Even for the eFPGA IP that is standard cell based (like Flex Logix), traditional emulation techniques are based on register-to-register transfers typical of traditional processor and SoC designs.

The challenge for eFPGA is that the flexible nature of the fabric creates many circular loops that are not “digestible” by existing emulation systems.

Flex Logix has figured out, over years, techniques for making existing emulation systems able to emulate eFPGA interconnect efficiently.


Emulation models are critical for first-silicon success and rapid chip development. Flex Logix can provide the full featured, parameterizable eFPGA emulation models needed to achieve this objective.

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