The Week In Review: Design

Cadence rolls out rapid prototyping platform, new extraction tool; Mentor introduces embedded software environment for heterogeneous multicore SoCs; Arteris wins deal with Shanghai InfoTM; Synopsys wins deal with Emulex; seven companies form Thread Group to speed IoT adoption.


Cadence unveiled two new tools. The first is a rapid prototyping platform that the company claims will shorten bring-up time by 70%, with 4X improvements in capacity, with IEEE 1801 support for low-power verification through its emulation platform. The second is a single and multi-corner custom/analog extraction tool, which it claims will improve performance by 5X. The tool has been certified for TSMC’s finFET process.

Mentor Graphics introduced an embedded software development environment for heterogeneous multicore SoCs that includes Linux, an RTOS and bare-metal applications. Mentor is targeting the development platform at the industrial, medical, automotive, telecommunications, networking and consumer electronics markets.

Arteris won a deal with Shanghai InfoTM Microelectronics, which will license Arteris’ NoC IP for tablets and consumer electronics.

Emulex signed a deal to use Synopsysverification IP for Ethernet.

Cadence won a deal with Ricoh for its new parasitic extraction tool, which the companies say has cut extraction time in half.

Seven companies have joined together into the Thread Group to create a new Internet Protocol-based wireless networking protocol called Thread. The founding members are ARM, Samsung Electronics, Freescale, Silicon Labs, Big Ass Fans, Yale and Nest (owned by Google). The goal is to improve interoperability, add support for IPv6, to add resiliency into networks so that if one part fails the rest keep operating, and to do it all with a low-power, wireless mesh network that can securely connect more than 250 devices.

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