The Week In Review: Design

Mentor rolls out new PCB design platform; Sonics debuts performance profiling and debug IP; CEVA, SMIC, Brite work on hard macro versions of DSPs; Synopsys wins MediaTek Deal; Cadence wins deals with Yamaha, Sharp; robot beats world record solving Rubik’s Cube.


Mentor Graphics unveiled a new version of its PCB design platform, even going so far as to rename it slightly (Expedition to Xpedition). Mentor claims it’s the most significant product in that space in years, bridging the environments between designers and engineers. Included are placement planning in densely packed boards, which simplifies re-use and improves time to market, and electro-mechanical optimization.

Sonics introduced SoC performance profiling and debug IP for post-silicon system validation and software development. The new IP can be embedded inside the on-chip interconnect to facilitate analysis and debug for architectural exploration, software development and chip services such as guaranteed performance.

CEVA, SMIC and Brite Semiconductor teamed up to provide hard macro versions of CEVA’s DSP cores. The goal is to reliably speed up design cycles.

Synopsys won a deal with MediaTek, which will use Synopsys’ tools for hierarchical designs.

Cadence won a deal with Sharp, which is using Cadence’s metric driven verification methodology and test bench tool to find corner-case bugs in proximity and ambient light sensors for cameras, smartphones and tablets. Cadence also won a deal with Yamaha, which is using its low-power solution to cut leakage power in its smart phone chips.

Other News
A CUBESTORMER 3 robot, using an ARM processor, broke the Guiness World Record for solving Rubik’s Cube. The new time: 3.253 seconds. It might be time to invent a harder puzzle.

Intel showed off 14nm silicon results for its second-generation SerDes, which the company says reduces power by 20% and area by more than 40% with the same performance as the 22nm version.

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