Material properties of embedded micro-bumps and wafer-to-wafer hybrid bonding on the thermal behavior of the package stack in 3D-ICs.
Thermal challenges in 3D-IC designs can cause a significant risk in meeting performance specifications. While the pace of Moore’s Law has slowed in recent years, system technology co-optimization (STCO) promises to mitigate technology scaling bottlenecks with system architecture tuning based on emerging technology offerings, including 3D technology. This white paper analyzes the impact of material properties of embedded micro-bumps (EμBumps) and wafer-to-wafer hybrid bonding (W2WHB) on the thermal behavior of the package stack in 3D-ICs.
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