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Chiplet-Based Advanced Packaging Technology from 3D/TSV to FOWLP/FHE


T. Fukushima, "Chiplet-Based Advanced Packaging Technology from 3D/TSV to FOWLP/FHE," 2021 Symposium on VLSI Circuits, 2021, pp. 1-2, doi: 10.23919/VLSICircuits52068.2021.9492335. Abstract: "More recently, "chiplets" are expected for further scaling the performance of LSI systems. However, system integration with the chiplets is not a new methodology. The basic concept dates back well over ... » read more

Characterization Of Micro-Bumps For 3DIC Wafer Acceptance Tests


The strong market needs to embed multiple functionalities from different semiconductor processing technologies into a single system continue to drive demands for more advanced 3DIC packaging technologies. Dimensions of copper pillar micro-bumps are consistently reduced in every new technology node to facilitate the 3D stacking of multiple dies so that overall system performance can be improved.... » read more

Advanced mm-Wave And Terahertz Measurements With Cascade Probe Stations


The strong market needs to embed multiple functionalities from different semiconductor processing technologies into a single system continue to drive demands for more advanced 3DIC packaging technologies. Dimensions of copper pillar micro-bumps are consistently reduced in every new technology node to facilitate the 3D stacking of multiple dies so that overall system performance can be improved.... » read more

Test Setup Optimization And Automation For Accurate Silicon Photonics Wafer Acceptance Production Tests


Implementing energy-efficient optical transceiver modules with silicon photonics (SiPh) and 3DIC technologies will help alleviate the increasing energy consumption for hyperscale data centers. To facilitate effective 3DIC heterogenous integration of these photonics integrated circuits for optical transceivers, high precision, repeatable and reliable SiPh wafer acceptance tests are essential and... » read more

New Approaches For Dealing With Thermal Problems


New thermal monitoring, simulation and analysis techniques are beginning to coalesce in chips developed at leading-edge nodes and in advanced packages in order to keep those devices running at optimal temperatures. This is particularly important in applications such as AI, automotive, data centers and 5G. Heat can kill a chip, but it also can cause more subtle effects such as premature aging... » read more

The Future of Testing


In our previous test blog posts, we looked at the history of automated test equipment for semiconductors and for printed circuit boards. This month, we look ahead to the test technologies that are emerging. The chip ATE field has essentially boiled down to Advantest, Teradyne, and Xcerra (LTX-Credence), while the board test market is dominated by Teradyne and Keysight Technologies (formerly ... » read more

Foundries Versus OSATs


Since the 1990s, commercial foundries have ruled semiconductor manufacturing while the [getkc id='83' comment='OSAT'] providers (OSATs) have dominated IC packaging and testing. But as the industry moves toward stacked die over the next couple of years, and big foundries see a chance to expand their reach, the stage is set for an all-out war. There is much at stake on both sides. Foundries g... » read more