Case study on monitoring strategy and understanding root cause of fin defectivity.
As design rules shrink, semiconductor manufacturing becomes more complex which leads to a huge increase in the defects which could cause a non-yielding die. Process control and inline defect analysis becomes widely relevant to help shorten the learning process from R&D to production. This paper discusses the various methodologies which leverage patterned wafer inspection tools to help analyze defect mechanisms and figure out an inline process monitor to drive defect reduction and control. A defect example from FinFETs is used throughout the paper, demonstrating the clever use of design grouping and design based inspected areas. These helped to determine the root cause of the problem of systematics in FinFET and also created a monitoring strategy for the same. The results support the effectiveness of the tools by helping to reduce defectivity in the finFET module and also creating a process monitor which can filter large numbers of defects to provide timely process learning.
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Experts at the Table, part 1: Shrinking features isn’t enough anymore. The big challenge now is how to achieve economies of scale and minimize complex integration issues.
Rising costs and gaps in equipment emerge as technology scales; new tools under development.
Explosion of data is forcing significant changes in where processing is done.
Combining the flexibility of a FPGA with the performance and cost benefits of an SoC is pushing this technology well into the mainstream.
New market opportunities and global competitiveness are limited by qualified people.
Researchers digging into ways around the von Neumann bottleneck.
The promise of advanced packaging is being able to integrate heterogeneous chips, but a lot of work is needed to make that happen.
Better algorithms and more data could bolster adoption, particularly at advanced nodes.
30 facilities planned, including 10/7nm processes, but trade war and economic factors could slow progress.
New architectures, packaging approaches gain ground as costs increase, but shrinking features continues to play a role.
Improvement still needed for uptime, defectivity, line edge roughness and process flows.
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