An overview of backside power delivery and the advantages it provides for chip developers.
The power delivery network (PDN) is a critical part of any modern semiconductor device. Even with advanced power-saving technologies, today’s chips are hungry for power. Traditionally, power is distributed through metal layers on the same side of the substrate as the signal metal layers. This creates competition for the available layers and pushes the limits of fabrication technology to add more metal with each new generation. The emerging approach of routing the PDN on the backside of the substrate addresses these challenges. It frees up more room for both the signals and the PDN, while reducing both static and dynamic IR drop. This white paper provides an overview of this solution and the advantages it provides for chip developers.
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