tag: Power delivery network

Distributed Batteries Within A Heterogeneous 3D IC To Optimize Performance
By Technical Paper Link - 28 Aug, 2023 - Comments: 0

A technical paper titled “On-Chip Batteries as Distributed Energy Sources in Heterogeneous 2.5D/3D Integrated Circuits” was published by researchers at University of Florida and Brookhaven National Laboratory. Abstract: "Energy efficiency in digital systems faces challenges due to the constraints imposed by small-scale transistors. Moreover, the growing demand for portable consumer electr... » read more

Stitching Together A Multi-Layer PCB PDN
By Patrick Carrier - 25 May, 2023 - Comments: 0

A printed circuit board (PCB) is much like a complicated city, with a myriad of intertwined pathways for data signals and power. To meet the electric current needs of modern, high-powered integrated circuits (ICs), the power distribution network (PDN) usually consists of wide power planes on multiple layers to provide a low-resistance path for power delivery. These planes are stitched together ... » read more

IEDM: Backside Power Delivery
By Paul McLellan - 09 Mar, 2023 - Comments: 0

One part of the short course that I attended at IEDM in December was about backside power delivery networks. It was presented by Gaspard Hiblot of imec and titled "Process Architectures Changes to Improve Power Delivery." The presentation is co-credited with Geert Hellings and Julien Ryckaert. I should preface this post with the fact that this presentation was 80 slides long and so I will only... » read more

Power Now First-Order Concern In More Markets
By Ann Mutschler - 10 Mar, 2022 - Comments: 0

Concerns about energy and power efficiency are becoming as important as performance in markets where traditionally there has been a significant gap, setting the stage for significant shifts in both chip architectures and in how those ICs are designed in the first place. This shift can be seen in a growing number of applications and vertical segments. It includes mobile devices, where batteri... » read more

Batteries Take Center Stage
By Heidi Elliott - 27 Dec, 2021 - Comments: 0

For any mobile electronic device, the biggest limiting factors are the size, age, type, and utilization of the batteries. Battery technology is improving on multiple fronts. The batteries themselves are becoming more efficient. They are storing more energy per unit of area, and work is underway to provide faster charging and to increase the percentage of that energy that can be used, as well... » read more

3D IC: Opportunities, Challenges, And Solutions
By Kenneth Larsen - 28 Sep, 2021 - Comments: 0

Nearly every big city reaches a point in its evolution when it runs out of open space and starts building vertically. This enables far more apartments, offices and people per square mile, while avoiding the increased infrastructure costs of suburban sprawl. Semiconductors are evolving in much the same way. Moore’s Law is slowing, and adoption of new advanced technology nodes is slowing as wel... » read more

Changes In Auto Architectures
By Ed Sperling - 04 Aug, 2021 - Comments: 0

Automotive architectures are changing from a driver-centric model to one where technology supplements and in some cases replaces the driver. Hans Adlkofer, senior vice president and head of the Automotive Systems Group at Infineon, looks at the different levels of automation in a vehicle, what’s involved in the shift from domain to zonal architectures, why a mix of processors will be required... » read more

Reducing Power Delivery Overhead
By Brian Bailey - 08 Jul, 2021 - Comments: 0

The power delivery network (PDN) is a necessary overhead that typically remains in the background — until it fails. For chip design teams, the big question is how close to the edge are they willing to push it? Or put differently, is the gain worth the pain? This question is being scrutinized in very small geometry designs, where margins can make a significant difference in device performan... » read more

Chip-Package Co-Analysis Using Ansys RedHawk-CPA
By Ansys - 11 Nov, 2020 - Comments: 0

Ansys RedHawk-CPA is an integrated chip–package co-analysis solution that enables quick and accurate modeling of the package layout for inclusion in on-chip power integrity simulations using Ansys RedHawk. With RedHawk-CPA a designer can perform static IR drop analysis and AC hotspot analysis of the package layout following RedHawk static and dynamic analyses respectively. To ensure a reliab... » read more

Redefining The Power Delivery Network
By Brian Bailey - 13 Aug, 2020 - Comments: 3

Reliably getting power around a package containing multiple dies, potentially coming from multiple sources, or implemented in diverse technologies, is becoming much more difficult. The tools and needed to do this in an optimized manner are not all there today. Nevertheless, the industry is confident that we can get there. For a single die, the problem has evolved slowly over time. "For a ... » read more

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