Wednesday At DAC 2018

Wednesday starts with a visionary talk followed by a keynote. The Visionary talk was given by Chidi Chidambaram, VP of engineering for Qualcomm, and looked at ‘Challenges to Enable 5G System Scaling.’ “We have to start taking a system view rather than just following technology and at the same time we have to get concerned about durability,” he said. “Mobile will continue to be the leader because of scale, and change will be incremental. Automotive will be the biggest growth area and this requires 1ppm defect rate and yet we don’t fully understand some of the issues associated with the creation of these devices as much as with the silicon. We have to model power and thermal better than in the past. The delay from middle and back EOL is as important as the delays from the silicon itself. The margin and variation of vias has become important. We are reaching the limit of the number of fins that we can depopulate.” He also implied that the migration to new nodes is no longer the natural way forward. “EUV will help, but it is investment in new architectures, methodology and tools that are required to win.”

The keynote was given by David A. Patterson of Google and the University of California, Berkeley and looked at “A New Golden age for Computer Architecture: Domain Specific Accelerators and Open RISC-V.”

He started by looking at computer architectures through history, ending up with the progression that led to the predecessors of RISC-V. Then he went through the challenges we are seeing today. “We are now seeing a doubling every twenty years,” he said, adding that we have an embarrassing situation with security. “Spectre shows that we have put performance over security.”

The third part of the talk was spent looking at opportunities, where “the only thing left is domain specific architectures and languages.” He used Tensor as an example to show how significant the improvements can be. The conversation returned to the birth of RISC-V and the fact that an open architecture will help with security. The final part of the talk looked at the Agile development methodology and how it applies to the development of hardware. His conclusion was that it is now quicker, cheaper and easier to create chips than it has been for long time. Nobody has any excuses any more. He pointed to the number of chips that his university had created recently and said you can get 100 chips for about $15,000.

Following the keynote, I conducted a roundtable. While the subject started off being about clock domain crossing, we quickly added the extra dimensions of reset and power, because there is no way to solve one without the others. There were also some additional dimensions that we decided not to get too involved with. This conversation will be brought to you in full later.

One of the things with DAC is that you get to talk with a lot of people, many of whom are not always available. I will be bringing you some of those conversations, while others will result in quotes being spread around in articles. One example was a very insightful interview with Lu Dai, chair of Accellera and senior director of engineering at Qualcomm. We talked about how the standards process has changed over the years and what it may portend for future standards.

Lunch today was spent with Mentor to hear about emulation in the Cloud. They are not taking about a private data center, but accessed directly from within AWS. “You can still buy emulators, but this provides an additional option,” said Jean-Marie Brunet. Potential users still have questions about security and they have been working for over a year and a half to ensure that customer requirements in this area are met. Brunet admitted that if you want to use in-circuit emulation (ICE), it presents a few additional difficulties, but they can work with people to make that happen as well.

The afternoon roundtable was about IP tracking and management. Many times we hear that IP is one of the problems associated with moving to the Cloud. You will get to hear what some experts in the field have to say about this and some of the other challenges that the industry is facing, plus some new directions that the IP industry may go in.

The afternoon was rounded out with a panel titled “Computing Minus Moore’s Law.” What happens when Moore’s Law ends and scaling is no longer the answer to everything? What may come next and how will this help the industry if Moore’s Law does in fact continue? “Technology gains are still the biggest piece of the pie,” said Kathy Wilcox of Advanced Micro Devices. “Over the next decade it will be a smaller piece of the pie. We are seeing advantages from 3D stacking that bring the processor and memory closer together. Design costs have been exploding and it is not just about masks. We also need to improve design efficiency. Machine learning provides opportunities.”

David Brooks from Harvard and Facebook points out that the last two nodes slipped. 14nm slipped by 2 quarters and 10nm by 2 years. “If we consider SRAM scaling, which we have been concerned about for some time, we see 2.5X less than ideal SRAM scaling since 90nm.” Brooks said that the semiconductor industry has become an unreliable partner for the broader tech industry. “This means that domain specific accelerators become necessary and this will cause a breakdown of computing abstractions. The end of Moore’s Law will create a democratization of technology and lead to more innovation.”

Yuan Xie from UC Santa Barbara reinforced the previous two viewpoints. “In the past, architecture and process technology have contributed to improvements in performance, but going forward we have to rely on architects much more. The biggest challenge is to bridge the gap between computing and memory.”

Krste Asanovic of UC Berkeley and SiFive talked about the perfect storm in the industry. “There are so many new applications coming, but the cost to create them is too expensive.” Asanovic believes that Moore’s Law died in 2015. “With chips costing $300M, you need 30M units before manufacturing equals NRE. The only path forward is through specialization, which adds value. We need a new law where the NRE/transistor drops by a factor of 2 every 12 months. This means we have to reduce choice and stop over-optimization.”

While there is an interesting keynote tomorrow morning, this ends my glimpse into DAC 2018. I hope it has been useful to those who could not attend and provided you with a feel of my view into DAC and the industry. Now, back to your regular programming.

Check out DAC highlights from Monday and Tuesday.