Week In Review: Design, Low Power

Tools & IP
Arm unveiled the Cortex-R82, a 64-bit, Linux-capable Cortex-R processor targeted for next-generation enterprise and computational storage solutions. The Cortex-R82 provides 2x performance depending on workload compared to previous Cortex-R generations and provides access of up to 1TB of DRAM for advanced data processing in storage applications. It offers an optional memory management unit (MMU) to allow for rich operating systems to run directly on the storage controller.

PUFsecurity uncorked PUFiot, a new high-security PUF-based crypto coprocessor. PUTiot provides three primitives for the security system: chip identification (UID), true random number generator, and XiP (eXecute in Place) encrypted OTP for storage of crypto keys that are available in an existing PUFrt product from PUFsecurity. It also supports security operations such as key generation, block cipher, integrity check, and identity verification.

Flex Logix announced that its nnMAX AI Inference IP is in development on GlobalFoundries’ 12LP FinFETplatform under an agreement with the U.S. Government. Extendable to GF’s 12LP+ for enhanced power performance, nnMAX AI Inference provides TensorFlowLite/ONNX programmable inference and is scalable, enabling a NxN array of nnMAX inference tiles to have N² the throughput of a single tile. The IP will also be available to commercial customers in 2H 2021.

TSMC certified multiple Mentor product lines and tools for its 3nm (N3) process technology. Mentor also expanded its support for TSMC’s 2.5/3D offering, enhancing the Xpedition software to meet TSMC’s requirements for InFO-R. In addition, the Calibre platform 3DStack technology expanded its support of inter-die LVS for TSMC offerings with support for CoWoS-S.

Deals
Micron and Rambus extended a patent license agreement for an additional four years. The extension maintains the existing financial terms of the agreement and provides Micron with a license to the portfolio of Rambus patents.

Nestwave integrated its soft core GPS navigation IP with Synopsys’ DesignWare ARC IoT Communications IP Subsystem for a complete low-power global navigation satellite systems (GNSS) solution for integration into battery-operated IoT modems. Nestwave used the ARC EM9D processor and custom instruction extensions provide performance boosts for its algorithms while minimizing processor frequency requirements.

Kneron included Cadence’s Tensilica Vision P6 DSP in its next-generation KL720, a 1.4TOPS AI SoC targeted for AIoT, smart home, smart surveillance, security, robotics, and industrial control applications. Kneron cited design flexibility and the compute efficiency to adapt to the demands of the latest algorithms on the edge, as well as support that helped speed IP integration.

Elektrobit ported its EB tresos Classic AUTOSAR software to Synopsys’ ASIL-D compliant DesignWare ARC EM and ARC HS Functional Safety (FS) Processor IP. The combined solution supports an integrated safety manager for single-chip automotive solutions and aims to make it easier for companies to develop software applications based on the AUTOSAR standard.

Education
Imagination Technologies announced a course on RISC-V computer architecture for under-graduate teaching as part of its Imagination University Programme (IUP). “RVfpga: Understanding Computer Architecture” includes a set of teaching materials and practical exercises aimed at helping students understand the key elements of processor architecture, including IP cores, modifying a RISC-V core and their microarchitectures. The course was created in association with academic partners Associate Professor Sarah Harris and Associate Professor Daniel Chaver.

Events
Find a new conference or learning opportunity at our events page, or check out an upcoming webinar.

The ARC Virtual Processor Summit will take place Sept. 9-10 with a focus on automotive, edge AI, and high-performance embedded solutions.

Meanwhile, the Arm Research Summit will take place Sept. 9-11 with focuses on sustainability, data science, and security.