What’s Next After DRAM?

Panel looks at memory alternatives, but DRAM is likely to stick around awhile longer.

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By Pallab Chatterjee
At the most recent Denali Memcon, there was a panel discussion and debate about the future of DRAM and possible successor technologies. The discussion was moderated by Cadence’s Steve Leibson and featured Bob Merritt of Convergent Semiconductor, Barry Hoberman of Crocus, Ed Doller of Micron and Marc Greenberg of Denali/Cadence.

The topic of the discuss was based on the growing trends in power efficiency, process scaling, and data retention as a changing environment for DRAM’s use in enterprise applications. New technologies have come and gone the past 50-plus years in solid state memory, and the debate about DRAM’s longevity has come up several times in the past. The presentations an positions of the 4 panelists were quite different, and ran the spectrum from use model, to business model, to technology issues.

Bob Merritt of Convergent started with the changes in the enterprise space that are driving the discussion. The unifying memory architecture from the ’80s was driving systems to use a central memory store for both processing and graphics memory. However, there is a shift in the type of data being created as the enterprise moves from a data-processing model to a multimedia model. As a result, graphics memory (GDDR) has become the only application for which this specific type of DRAM is still being used.

Also, the data processing has shifted from the corporate- and PC-centric side to the customer-centric side with mobile and smart devices. This has led to the conclusion it is not DRAM itself that needs to be replaced. It is the business model associated with DRAM. The historic model was based on a commodity model rather than a value-add model, which limits the ability to market into new and diverse markets.

Barry Hoberman of Crocus Technology presented the technology case for Magnetic RAM or MRAM. The cost per bit for MRAM is not on par with DRAM at this time, but in the near future it will be reaching cost parity as a solution with a DRAM/control logic/battery for NV applications. As DRAM applications stretch further in the consumer product space, additional features related to SRAM and NVRAM (flash) become more prevalent. From an embedded use perspective, MRAM processing is more compatible and less of an overhead than FLASH compared to CMOS. Hoberman concluded that with the shift in application space, MRAM will be a cost-effective and viable technology for systems.

Ed Doller of Micron, gave an overview of five technologies – FeRAM, MRAM, FBRAM, TRAM, and PCM. The FBRAM and TRAM technologies are not in production today, so their viability for being a near-term replacement is low. FeRAM and MRAM, while in production, are not application-compatible with DRAM and are not scalable to the same degree. This leaves Micron with the PCM technology it recently acquired from Numonix. The technology is in production and is scalable, but the use and application are not fully DRAM compatible. Doller said there is no need to replace DRAM immediately, but a replacement will be needed within the next five years.

Mark Greenberg from Denali/Cadence took the position that DRAM won’t be replaced at all. From its start in the 1970s the technology has undergone over 50 design iterations. The technology and concepts behind the DRAM date back to principles and components from the 18th century (capacitor) and early 20th century (transistor) and are not outdated. The cost of the technology is very low for the end product on a per unit (bit cell) basis. And while there are process challenges, there is no reason to believe that these are insurmountable as logic processes have similar challenges. And finally, Greenberg asked non-believers to show him a silicon technology that was superseded solely on continued manufacturability. He said DRAM’s demise is premature.

The overall summary from the audience questions was that as systems applications change, there are memory options, but DRAM will still play a major role