The challenge for the SoC architect is to design a chip with an AI inference solution that is flexible for any future neural network not yet invented.
Chips being designed today for the automotive, mobile handset, AI-IoT (artificial intelligence – Internet of things), and other AI applications will be fabricated in a year or two, designed into end products that will hit the market in three or more years, and then have a product lifecycle of at least five years. These chips will be used in systems with a large number and various types of sensors. Therefore, the AI inference solution must be tailored to the end application for maximum efficiency and the longest possible shelf life.
The challenge for the SoC architect is to design a chip with an AI inference solution that is flexible for any future neural network not yet invented. This white paper will explain how an optimized DSP (digital signal processor) is the key to long shelf life for algorithms that have yet to be invented for AI applications.
By Pulin Desai, product management group director, Tensilica IP, Cadence
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