March 2011 - Page 4 of 5 - Semiconductor Engineering


Design For Configurability


I admit it was a bit of a surprise to me to hear from a leading IP provider of the missteps that still befall design teams today as they seek to reuse IP, but it’s a little like rubbernecking. How do you not look? According to Grant Martin, chief scientist at Tensilica, “The biggest thing that people still don’t think about at the beginning of designing some new function is designing i... » read more

Billion-Gate Chips


Low-Power Engineering examines hurdles ranging from power to cost in billion-gate IC designs with Arteris; Jack Browne, senior vice president of sales and marketing at Sonics; Kalar Rajendiran, senior director of marketing at eSilicon; Mark Throndson, director of product marketing at MIPS; and Mark Baker, senior director of business development at Magma. [youtube vid=0jum2ThIVzg] » read more

The SOI Papers at ISSCC 2011


By Adele Hars The International Solid-State Circuits Conference — better known as ISSCC — is of course where the big guns show us their big advances at the chip level. At the most recent conference, held a few weeks ago in San Francisco, advances that leveraged SOI were once again at the forefront. As always, performance gains generate plenty of buzz. But the SOI papers were also nota... » read more

Experts At The Table: 3D Stacking


By Ed Sperling Semiconductor Manufacturing and Design sat down with Riko Radojcic, director of engineering at Qualcomm; Drew Wingard, CTO at Sonics; Michael White, senior product marketing manager for Calibre physical verification at Mentor Graphics; Jim Hogan, a Silicon Valley venture capitalist; Prasad Subramaniam, vice president of design technology at eSilicon; and Mike Gianfagna, vice pr... » read more

Innovation Is Not Enough


By Heinz Kundert, president, SEMI Europe We often hear that innovation is the key to smart and sustainable growth for Europe. But history has shown that innovation alone is not enough to create sustainable growth and sufficient jobs. To achieve an acceptable return on investment in Europe, advanced manufacturing is indispensible. Therefore, it is good to see that the European Commission has ... » read more

Imprint as the next NGL


By Mike Watts For imprint watchers, SPIE’s Advanced Microlithography in February was very interesting, in that there were several presentations that appeared to be linked, but the presenters denied that there were links ….which makes me think ! Toshiba (Tokyo, Japan) started the ball rolling with a detailed status report on their evaluation of the Molecular Imprints (MII – Austin TX... » read more

SPIE – Day 4


This week in San Jose began cold, but warmed up by Thursday to the kind of weather we all expect from California. So too with the conference, and I think Thursday had some of the most interesting, and surprising, presentations. The day began for me with the much-anticipated presentation by ASML on the NXE:3100 extreme ultraviolet (EUV) “pre-production” lithography scanner. As expected,... » read more

SPIE – Day 3


Today I talked more than listened. I had two papers, both on stochastic effects in lithography. In one, I showed a complete model for EUV resist exposure and for predicting stochastic uncertainty in the acid concentration at the end of exposure. The second, looking at quenching effects, is unfortunately a work in progress. There is still much to learn. One important lesson is to get my pap... » read more

SPIE – Day 1


The SPIE Advanced Lithography Symposium always begins on Monday, unless you take (or teach) a short course the day before. Only 12 courses are being taught this year, a low not seen this millennium and indicative of austere times. Still, short course attendance was up a tiny bit, and my course was full, and as always was fun to teach. I had two young engineers from Egypt in my class, and whe... » read more

SPIE – Day 2


I spent much of Tuesday learning about alternate lithography schemes. Toshiba gave an update on their efforts to evaluate nanoimprint lithography for chip manufacturing. The technology is closer to prime-time than I expected. Most of the data for 28 nm half-pitch looked very, very good (CDU of 1.2nm, LWR of 2nm, mix-and-match overlay of 10nm), but of course there is one big problem remaining... » read more

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