May 2011 - Page 4 of 4 - Semiconductor Engineering

Waiting for Porous Low-k
By Katherine Derbyshire - 12 May, 2011 - Comments: 0

I'm working on a longer article on low-k dielectric integration, but in the meantime I wanted to pass along an observation from Joubert Olivier of LTM-CNRS, in his presentation at the Materials Research Society Spring Meeting. Asked about the prospects for low-k integration, he reminded the audience that even if an integration scheme is able to achieve good selectivity between the hard mask ... » read more

SoC Realization: The Linchpin To Enabling Electronics Innovation
By Various Writers - 11 May, 2011 - Comments: 0

There are significant changes occurring in the electronics industry. The widespread consumerization of electronic devices has permanently changed our lives for the better. The rate at which hand-held, personal electronic products are evolving is staggering by any historical measure. These rapid advances are facilitated by system on chip (SoC) devices, the microelectronic marvels of engineering ... » read more

EDA’s Dr. Jekyll and Mr. Hyde
By Mentor Graphics Staff Writers - 10 May, 2011 - Comments: 0

By Joe Davis The need for tool Integration and the reality of competition create a Jekyll and Hyde dichotomy for the EDA industry. Customers are demanding functionality that requires tight integration between tools even when they come from competing EDA companies. We have some examples of success, but this remains a challenging area. Customers can help or sit on the sidelines, but integratio... » read more

Planning For Physical Effects
By Ed Sperling - 06 May, 2011 - Comments: 0

The importance of Intel’s announcement that it has perfected 3D transistors and will roll them out this year should not be understated. This is a major breakthrough technologically, with major implications for power, performance and even competitiveness. FinFETs have been the subject of some intensive research for more than a decade, with the University of California at Berkeley leading the c... » read more

Experts At The Table: Verification At 28nm And Beyond
By Ed Sperling - 06 May, 2011 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss issues in verification at 28nm and beyond with Frank Schirrmeister, director of product marketing for system-level solutions at Synopsys, Ran Avinun, marketing group director at Cadence, Prakash Narain, president and CEO of Real Intent, and Lauro Rizzatti, general manager of EVE-USA. What follows are excerpts of that conversation. LPE... » read more

Patterned LED Substrates
By Michael Watts - 03 May, 2011 - Comments: 0

by Mike Watts Patterning in LEDs continues to get plenty of research attention, with no less than 11 papers at Photonics West 2011. This is an interesting example of the challenges of technology and business forecasting. For several years it looked like improving light extraction using a surface photonic crystal would be implemented, but to date the improvement in light extraction has not of... » read more

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