July 2012 - Page 3 of 5 - Semiconductor Engineering

Who Calls The Shots?
By Kurt Shuler - 26 Jul, 2012 - Comments: 0

By Kurt Shuler Who REALLY calls the shots in chip design today? That sounds like a stupid question. Who really calls the shots in chip design today? Well, chip designers of course. But you’re wrong if you mean to say that the traditional semiconductor manufacturers are the ones who always do all the hefty work of chip design, including determining requirements, performing technical tra... » read more

The Power Of Dark Silicon
By Frank Ferro - 26 Jul, 2012 - Comments: 0

By Frank Ferro Even though the cloud is permeating everything we do today, I was recently reminded that it's even omnipresent far outside the walls of tech. With all the TV ads, as well as our most prominent airports and U.S. highways peppered with cloud-based billboards, even our parents know how to properly use cloud in sentence today. But to hear about the cloud from the pulpit at church on... » read more

Motorcycle Diaries
By Jon McDonald - 26 Jul, 2012 - Comments: 0

By Jon McDonald I recently had reason to add another vehicle to my household. My son is starting to drive, so he's taking my car. Instead of another car I decided to get a motorcycle. I have had a couple, but it's been a few years. After much browsing I decided on a Ducati, I picked it up a few weeks ago. It has an impressive number of user adjustable electronic controls, everything from AB... » read more

Experts At The Table: Does 20nm Break System-Level Design?
By Ed Sperling - 26 Jul, 2012 - Comments: 0

By Ann Steffora Mutschler System-Level Design sat down to discuss design at 20nm with Drew Wingard, chief technology officer at Sonics; Kelvin Low, deputy director of product marketing at GlobalFoundries, Frank Schirrmeister, group director of product marketing for system development in the system and software realization group at Cadence; and Mike Gianfagna, vice president of marketing at At... » read more

Multi-Source CTS Delivers Flexible High Performance and Variation Tolerance
By Various Writers - 26 Jul, 2012 - Comments: 0

Multi-source clock tree is a hybrid containing the best aspects of a conventional clock tree and a pure clock mesh. This paper illustrates the benefits such as lower skew and better on-chip-variation (OCV) performance compared to a conventional clock tree. To download this white paper, click here. » read more

Achieving Fast And Accurate Extraction Of 3D-IC Layout Structures
By Various Writers - 26 Jul, 2012 - Comments: 0

The electronics industry is devoting a lot of energy to exploring “More than Moore’s Law” approaches that drive continued value scaling through system integration, rather than (or in addition to) shrinking transistors. One of the most promising techniques is the creation of 3D-ICs using TSV structures. However, accurately modeling a 3D multi-die system requires tools that extract precise ... » read more

Bringing Continuous Domain Into SystemVerilog Covergroups
By Various Writers - 26 Jul, 2012 - Comments: 0

This paper proposes a set of requirements for specifying functional coverage on an analog or mixed-signal block. We explain how the real number data type can be introduced in the [gettech id="31023" comment="SystemVerilog"] coverpoint specification and how it can enable a complete coverage specification for a mixed-signal verification environment. In discussing the requirements, we explore the... » read more

More Design Rules Ahead
By Ed Sperling - 25 Jul, 2012 - Comments: 0

By Ed Sperling & Mark LaPedus For those companies that continue to push the limits of feature shrinkage, designs are about to become more difficult, far more expensive—and much more regulated. Two converging factors will force these changes. First, the limits of current 193nm immersion lithography mean companies now must double pattern at 20nm, and potentially quadruple pattern at 14n... » read more

Increasing Certainty For 20nm Design
By Frank Schirrmeister - 25 Jul, 2012 - Comments: 0

By Frank Schirrmeister At the recent Design Automation Conference two topics were getting very special attention: Design at 20nm and System-Level Design. This is very indicative of the very opposite trends we have been facing in semiconductor designs for the last couple of decades. On the one hand, the actual design units get smaller and smaller, and we are today happily designing for technolo... » read more

Experts At The Table: Multipatterning
By Ed Sperling - 20 Jul, 2012 - Comments: 0

By Ed Sperling Semiconductor Manufacturing & Design sat down with Michael White, physical verification product line manager at Mentor Graphics; Luigi Capodieci, R&D fellow at GlobalFoundries; Lars Liebmann, IBM distinguished engineer; Rob Aitken, ARM fellow; Jean-Pierre Geronimi, CAD director at STMicroelectronics; and Kuang-Kuo Lin, director of foundry design enablement at Samsung Ele... » read more

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