Experts At The Table: Does 20nm Break System-Level Design?

Last of three parts: Generic hardware; the increasing role of foundries; customers matter.

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By Ann Steffora Mutschler
System-Level Design sat down to discuss design at 20nm with Drew Wingard, chief technology officer at Sonics; Kelvin Low, deputy director of product marketing at GlobalFoundries, Frank Schirrmeister, group director of product marketing for system development in the system and software realization group at Cadence; and Mike Gianfagna, vice president of marketing at Atrenta participated in the discussion. What follows are excerpts of that discussion.

SLD: If the majority of the system is software and the hardware is more generic, how do you optimize? What kind of flexibility do you need in the hardware for a specific application?
Wingard: I’m not a believer that we’re going to lose specialization in hardware. Trying to optimize general-purpose processors to solve all these things is difficult. The way Tensilica gets their 5 to 10 to 100X advantages is because they are customizing the processor for the domain. So the idea that we’re going to have general-purpose processors running later-defined software to define the bulk of the system is not something I ascribe to in a consumer SoC domain. I do believe, however, that programmable processors are going to be an important element in many of the subsystems that are designed. To me the question is, ‘How many of those software stacks are visible to the end application user or even to the OEM?’ So many of these processors are running software that’s going to be delivered either by the subsystem provider or by the semiconductor company that decides to embed that.
Schirrmeister: It’s on a subsystem level, and then you have hierarchy, so you have any number of those on a chip.
Gianfagna: There has to be configurability.
Wingard: Of course, there has to be. That’s why they put software in. There are good reasons for putting software in there. I use a programmable processor because it gives me some additional flexibility—some of which I may use when I sell them the subsystem; some of which I may need to use to patch what I sold; and some of which I may use to try to react to what changes in the market. When you put a processor into a subsystem, many good things happen, and one unfortunate thing happens from the perspective of the performance analysis: You cannot ignore that software. When I change the function of the hardware block in software, the behavior of a hardware block that otherwise might be very predictable becomes more stochastic and has some very interesting characteristics. When you’re trying to do things like making sure you have enough memory system bandwidth to cover this specific use case, and the specific software that’s going to run inside that accelerator isn’t written yet, there are challenging system design choices that need to be made. And there’s a limited amount of over-design that can be put in because otherwise you over-provision and then you have a cost problem. What we see as the most practical approach is you take your best guess at it and you continuously verify. That’s where it becomes super important that whatever you did from this high-level very abstract model you continuously verify as that software is available. You want to replace your transaction-level model of that component with something that’s actually running the real software or pulling traces off of something.

SLD: What role will the foundries play in the new world of system-level driven design?
Low: That’s a good question because EDA and IP are all investing billions of dollars. Do you see a place where the foundry can be more proactive to help… to prevent a breaking point? At GlobalFoundries we are definitely trying to be very open as contrasting with other competitors because we see a need and customers are telling us we need to do that.
Wingard: I absolutely believe GlobalFoundries and others could be facilitating much more interesting interactions amongst IP and EDA companies than what you often get. When we get those choices for interaction it’s usually at the hands of a customer who is already in a crisis. You have the opportunity for being a bit more proactive about it.
Schirrmeister: You can also trigger things in standardization, or help at least contribute in standardization. If I look into things like low power and annotating TLM models, that’s done ad hoc today. There’s no standard on how to characterize the data or process the CPF/UPF. TSMC for two years had an ESL reference flow. That’s the right initiative— to get the parties together into a flow perspective together with yourself from the technology side and some driving customers. Part of this standardization may fall out of it. Certain things like power standards are extended upwards, performance-annotating standards are extended upwards, so these things are not done ad hoc. Is this breaking things today? I don’t think standardization is preventing that from happening today, meaning it’s still only the leading-edge customers doing it. They say they can’t annotate their TLM models with low power. ‘I characterize down here at the layout–that’s awesome, how do I do it?’ And they don’t care about whether the API is standardized. Five years down the road that might be different–maybe even three years down the road. So that’s something where you should at least contribute. You could even potentially spearhead proactively, as you see more and more customers that have this issue, instead of the chip having burned out on the board and then somebody saying, ‘Did you ever annotate this backup into the TLM model to figure out that the software doesn’t switch off this power domain?’
Gianfagna: I think what we’re all saying is, ‘No pressure,’ but where you sit in the ecosystem you can be the thought leader and you can be the nexus point to force a cooperation to make this happen. My advice would be to not wait for customer to demand it. Be proactive. Drive it as a vision of where the industry needs to go because if you do it that way there will be more chips built. If you can make a bigger pipeline for design you’ll sell more wafers. Invest in that piece. You can help.

SLD: Don’t customers have to play a very close role in that?
Gianfagna: Of course they do, but if you wait for them to demand it there is a crisis and it’s a little too late.
Wingard: We are no different than the customers are in many cases. Our development pipelines are long enough that if we’re not told about the problem until they are in the middle of the design then it’s already too late for us to do any new R&D to actually help them in that design. We are already looking at their next design. The level of technology that we are working with is on a par with the level of technology that our customers have to work with. That’s the benefit of the IP and EDA model. We are doing substantial skilled development just like our customers are.
Gianfagna: The leading-edge customers will always give you some insight into what they need. The world refuses to be homogenized, so it won’t be standard hardware architectures with software doing all the differentiation. It will be a constant interplay. And by the way, hardware-software co-design, which has been talked about for a very long time, is becoming real. When the software guys have to drive the agenda and be at the top of the stack, the arrow’s got to point the other way in the design flow. That’s a really interesting problem to solve. No one has solved it yet. There are all kinds of problems. Is it about transactional-level? Is it instruction-accurate? Is it instruction-approximate? What the heck is it? How do you get enough performance? How do you model a hardware architecture with enough fidelity in software for which you can still boot the OS in less than a month? You’ve got all these problems–they are interesting problems to solve, but they will be solved and new users will be brought to the table. We will get to a certain level of efficiency and implementation listening to our early adopter customers, but I feel like there’s more that can be done if there is an external influence to bring people to the table. It will happen faster because if you just wait for the leading-edge customer to drive it or you wait for someone to have the problem it is going to happen at a rate that is not interesting. If you can handle a more visionary leadership by someone who can bring people to the table like someone may be who controls the silicon supply.
Schirrmeister: There is another bird you could kill at the same time, which is this whole notion of the subsystem. If I think about it, you could make all of this a reference platform.
Low: We are talking about trying to build a platform. Several pieces of IP integrated for a smart mobile computing platform is one notion. Building a platform and verifying it at the system level or subsystem level and seeing how they integrate–we are trying to push that–obviously it is hard without a driving force. We have a very strong investment and the focus is not only on running wafers, but increasingly looking at the bigger picture.