Customization And Limitations At The Edge


Semiconductor Engineering sat down to discuss the edge constraints and the need for security with Jeff DeAngelis, managing director of the Industrial and Healthcare Business Unit at Maxim Integrated; Norman Chang, chief technologist at Ansys; Andrew Grant, senior director of artificial intelligence at Imagination Technologies; Thomas Ensergueix, senior director of the automotive and IoT line of... » read more

Rethinking Architectures Based On Power


The newest chips being developed for everything from the cloud to the edge of the network look nothing like designs of even a year or two ago. They are architected for speed, from the throughput of high-speed buses and external interconnects to the customized accelerators and arrays of redundant MACs. But many of these designs have barely scratched the surface for saving power, which will becom... » read more

Scaling At The Angstrom Level


It now appears likely that 2nm will happen, and possibly the next node or two beyond that. What isn't clear is what those chips will be used for, by whom, and what they ultimately will look like. The uncertainty isn't about the technical challenges. The semiconductor industry understands the implications of every step of the manufacturing process down to the sub-nanometer level, including ho... » read more

Tracking Automotive’s Rapidly Shifting Ecosystem


The automotive ecosystem is becoming much harder to navigate as automakers, Tier 1s and IP vendors redefine their relationships based upon shifting value caused by an rapidly expanding amount of increasingly interdependent and complex electronic content. Predictions of massive change started almost a decade ago with a number of pilot programs around autonomous vehicles. But those shifts real... » read more

Into The Cold And Darkness


The need for speed is limitless. There is far more data to process, and there is competition on a global scale to process it fastest and most efficiently. But how to achieve future revs of improvements will begin to look very different from the past. For one thing, the new criteria for that speed are frequently tied to a fixed or shrinking power budget. This is why many benchmarks these days... » read more

A New Dawn For IP


The IP industry is changing again. The concept started as build once, use everywhere, but today it is more like architect once, customize everywhere. Few designs can afford sub-optimal IP for their application. The need for customized IP is driven by both leading-edge designs and the trailing markets, although for different reasons. While this customization is causing IP companies to transfo... » read more

Hardware-Software Co-Design Reappears


The core concepts in hardware-software co-design are getting another look, nearly two decades after this approach was first introduced and failed to catch on. What's different this time around is the growing complexity and an emphasis on architectural improvements, as well as device scaling, particularly for AI/ML applications. Software is a critical component, and the more tightly integrate... » read more

HW/SW Design At The Intelligent Edge


Adding intelligence to the edge is a lot more difficult than it might first appear, because it requires an understanding of what gets processed where based on assumptions about what the edge actually will look like over time. What exactly falls under the heading of Intelligent Edge varies from one person to the next, but all agree it goes well beyond yesterday’s simple sensor-based IoT dev... » read more

More Performance At The Edge


Shrinking features has been a relatively inexpensive way to improve performance and, at least for the past few decades, to lower power. While device scaling will continue all the way to 3nm and maybe even further, it will happen at a slower pace. Alongside of that scaling, though, there are different approaches on tap to ratchet up performance even with chips developed at older nodes. This i... » read more

Where ML Works Best


Anirudh Devgan, president of Cadence, sat down with Semiconductor Engineering to discuss machine learning inside and outside of EDA tools and how that will affect the future of chip and system design. What follows are excerpts of that discussion. SE: How do you see the market and use of machine learning shaping up? Devgan: There are three main areas—machine learning inside, machine lear... » read more

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