Achieving Fast And Accurate Extraction Of 3D-IC Layout Structures

Accurate modeling of stacked die requires tools that extract precise electrical parameters from the physical structure of new 3D elements.

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The electronics industry is devoting a lot of energy to exploring “More than Moore’s Law” approaches that drive continued value scaling through system integration, rather than (or in addition to) shrinking transistors. One of the most promising techniques is the creation of 3D-ICs using TSV structures. However, accurately modeling a 3D multi-die system requires tools that extract precise electrical parameters from the physical structure of these new 3D elements, which can then be fed into behavioral simulators. This paper describes a practical approach to achieve fast and accurate 3D-IC extraction being developed by Mentor Graphics.

To download this white paper, click here.