September 2013 - Semiconductor Engineering

Expert on Expert: The Higgs Boson
By Ed Sperling - 30 Sep, 2013 - Comments: 0

Mentor Graphics CEO Wally Rhines, a materials scientist, talks with Dr. Sean Carroll, a particle physicist at the California Institute of Technology about the discovery of the Higgs Boson, the cost of future discoveries, and what's left for physicists to discover. [youtube vid=qokwittw_8k] » read more

The Week In Review: Sept. 30
By Mark LaPedus - 30 Sep, 2013 - Comments: 0

In a deal that could shake-up the fab tool landscape, Applied Materials has announced a definitive agreement to acquire rival Tokyo Electron Ltd. (TEL) in a stock deal valued at around $9.3 billion. The Fraunhofer Institute for Solar Energy Systems ISE, Soitec, CEA-Leti and the Helmholtz Center Berlin jointly announced having achieved a new world record for the conversion of sunlight into e... » read more

Semicon West Lithography Report
By Chris Mack - 29 Sep, 2013 - Comments: 0

OK, I have to admit this right off:  I didn’t go to Semicon West (held two weeks ago in San Francisco).  I try never to go to Semicon West (I’ve been twice in the last 30 years, both times against my will).  Why should I go?  To listen to the latest marketing messages and company spin?  To see a few technical talks that are way too light on the technical, but still full of talk?  I do... » read more

SPIE Advanced Lithography 2013 – day 2
By Chris Mack - 29 Sep, 2013 - Comments: 0

There were some great papers at AL on Tuesday.  Here are some of my favorites.  Peter Trefonas of Dow created a photosensitive block copolymer using a class of molecules called bottle brush polymers.  This very early work nonetheless exhibited very good results – close to 20 nm resolution (e-beam litho) with nearly the first bottle of stuff they mixed up.  The idea is simple:  marry the ... » read more

Viable Choices Ahead
By Ed Sperling - 27 Sep, 2013 - Comments: 0

Two years ago—basically one process node back, wherever companies were on the Moore’s Law road map—there was confusion about what lies ahead and what is the best way to proceed. During that time, three very viable options have been proven to work. Some already are in silicon, while others are coming very soon. The first is the finFET. At the very leading edge of the road map, finFET... » read more

Rethinking The Data Center
By Ed Sperling - 27 Sep, 2013 - Comments: 0

Ever since the introduction of the PC, the biggest challenge in computing has been more about getting software to take advantage of multiple processors or cores than getting the chips to run faster. Ironically, this issue was solved decades ago inside of data centers. Enterprise applications, built on databases, have always been relatively easy to parse so that individual pieces can be run sepa... » read more

The Week In Review: Sept. 27
By Ed Sperling - 27 Sep, 2013 - Comments: 0

By Ed Sperling Applied Materials shook up the equipment market, announcing a deal to buy Tokyo Electron for about $9.3 billion in stock. The combination of No. 2 Applied and No. 3 TEL in that market equals a new No. 1, surpassing Dutch giant ASML in terms of revenue. Mentor Graphics rolled out a new versiion of its computational fluid dynamics product, adding Monte Carlo radiation modeling... » read more

Productivity, Predictability And Use-Model Versatility
By Various Writers - 26 Sep, 2013 - Comments: 0

Hardware-assisted verification and prototyping has become a mandatory requirement to allow design teams to gain confidence that a chip tape out can be initiated. The choice of the right hardware-accelerated engine is driven by its productivity, predictability, and use-model versatility, all impacting the key concern of users how to remove bugs. The XP Platform allows design teams to get to the ... » read more

What Needs To Be Fixed
By Ed Sperling - 26 Sep, 2013 - Comments: 0

Some incredible engineering feats at the nano level—particularly below 40nm—are making their way into production chips. Even creating a sub-micron chip in the first place is a testament to the advances in semiconductor engineering. Turning off large sections of the chip and implementing techniques such as voltage and frequency scaling, power gating, multiple voltage rails and islands, multi... » read more

Time To Think
By Ed Sperling - 26 Sep, 2013 - Comments: 0

The semiconductor industry seems to be running place these days—maybe even sprinting in place. At the leading edge of design, companies are still looking at the ramifications of moving to finFETs. The move to a 20nm process with double patterning on 16/14nm finFETs, depending on the foundry, looks like a fairly safe bet for those companies with the volume and the resources to design and de... » read more

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