September 2013 - Page 4 of 9 - Semiconductor Engineering


Risk Vs. Reward


One of the most persistent business myths is that deep pockets in challenging times always win in the end. While that has proven a successful model in many industries where the barrier to entry is enormous and rising, in the technology world the outcome isn’t always what you’d expect even with those same variables. In fact, the history of technology is littered with former business giant... » read more

Litho Roadmap Remains Cloudy


By Mark LaPedus For some time, the lithography roadmap has been cloudy. Optical lithography has extended much further than expected. And delays with the various next-generation lithography (NGL) technologies have forced the industry to re-write the roadmap on multiple occasions. Today, there is more uncertainty than ever in lithography. Until recently, for example, leading-edge logic chipma... » read more

Keeping EUV Cool


It’s been clear for a long time that EUV lithography sources will be fairly inefficient. The laser-produced plasma (LPP) source concept involves heating a droplet of metallic tin with a high-powered laser to produce a plasma. Only a fraction of the energy of the laser will be converted to light, rather than heat, and less than 1% of the light emitted by the plasma will be at EUV wavelengths. ... » read more

What’s After 3D NAND?


By Mark LaPedus Planar NAND flash memory is on its last scaling legs, with 3D NAND set to become the successor to the ubiquitous 2D technology. Samsung Electronics, for one, already has begun shipping the industry’s first 3D NAND device, a 24-level, 128-gigabit chip. In addition, Micron and SK Hynix shortly will ship their respective 3D NAND devices. But the Toshiba-SanDisk duo are the lo... » read more

MRAM Begins To Attract Attention


By Mark LaPedus In the 1980s, there were two separate innovations that changed the landscape in a pair of related fields—nonvolatile memory and storage. In one effort, Toshiba invented the flash memory, thereby leading to NAND and NOR devices. On another front, physicists discovered the giant magnetoresistance (GMR) effect, a technology that forms the basis of hard disk drives, magnetores... » read more

Executive Briefing: Soitec CEO


By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss FD-SOI, solar and various technology trends with André-Jacques Auberton-Hervé, chairman and chief executive of Soitec, a supplier of silicon-on-insulator (SOI) substrates, solar concentrators and other products. SMD: The digital process roadmap is moving in several directions. Some pure-play foundries will offer ... » read more

Dissecting The Numbers


In the annals of semiconductor history, July is typically the worst month of the year in terms of sequential monthly change. Going back to 1997, semiconductor sales in July are usually down 10% to over 30%. The chart below shows a pictorial representation of the monthly percent change in July over June for the last 16 years. We’re not implying that everyone should break out the party hats,... » read more

Mask Data Prep Issues Compounding At 20nm


By Ann Steffora Mutschler When it comes to mask data prep—the step in the design and manufacturing flow that occurs just after optical proximity correction (OPC)—challenges have continued to rise with the subsequent moves to smaller geometries. This is driven by the scaling demands of delivering about a 50% area shrink from node to node on a two-year cycle, and thus dictates the lithog... » read more

Should EDA Heads Be In The Cloud?


Consider the following two comments about cloud computing and electronic design automation: “Over time everybody will move to the cloud in EDA at least in some extent.”—Raik Brinkmann, CEO of OneSpin Solutions. “We put a substantial effort into that, and of all the things we've done in the last 25 years this is probably the single one where the result is essentially zero. I don't ... » read more

The Impact Of 14-nm Photomask Uncertainties on Computational Lithography Solutions


Computational lithography solutions rely upon accurate process models to faithfully represent the imaging system output for a defined set of process and design inputs. These models, in turn, rely upon the accurate representation of multiple parameters associated with the scanner and the photomask. While certain system input variables, such as scanner numerical aperture, can be empirically tuned... » read more

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