What’s After 3D NAND?

ReRAM and phase change are top candidates, but the next generation of memory raises a lot of questions.


By Mark LaPedus
Planar NAND flash memory is on its last scaling legs, with 3D NAND set to become the successor to the ubiquitous 2D technology.

Samsung Electronics, for one, already has begun shipping the industry’s first 3D NAND device, a 24-level, 128-gigabit chip. In addition, Micron and SK Hynix shortly will ship their respective 3D NAND devices. But the Toshiba-SanDisk duo are the lone holdouts, as the joint venture partners will extend planar NAND as long as possible before rolling out a 3D NAND device in 2016.

Still, after years of R&D, the 3D NAND era is finally here. But amid the celebration, the industry continues to work feverishly on the probable successor, or competitor, to 3D NAND—resistive RAM (ReRAM). In the works for years, ReRAM is also being touted as a replacement for 2D NAND, NOR flash and other memory types.

ReRAM is nonvolatile and based on the electronic switching of a resistor element material between two stable resistive states. The technology is attractive because it is said to deliver faster write times with more endurance than today’s flash. Other next-generation memories, such as STT-MRAM and phase-change, make similar claims.

Needless to say, the next-generation memory landscape is confusing. “The leading replacements for NAND in storage are phase-change and ReRAM,” said Alan Niebel, chief executive of Web-Feet Research. “STT-MRAM could be a DRAM replacement, but it is too costly for storage.”

Two scenarios
At one time, FeRAM, MRAM, phase-change and ReRAM were all billed as “universal memories,” which are single devices that could replace today’s DRAM, flash and SRAM. But conventional memory has scaled much further than previously thought, pushing out the universal memories. The next-generation memories also fell behind schedule, as the devices are expensive to make and difficult to scale.

As the roadmap stands today, 2D NAND will scale until about 10nm before hitting the wall. In any case, 2D NAND, and the new 3D NAND devices, will co-exist in the market for some time. Then, there are two possible future scenarios. In one possibility, ReRAM could replace 3D NAND, but that may not occur until the sub-10nm node in 2020. “3D NAND has pushed out the (ReRAM) roadmap,” said Greg Wong, an analyst with Forward Insights. “3D NAND will last throughout the decade.”

In another scenario, the first ReRAMs for storage could appear in 2015, putting ReRAM in competition with 2D NAND, 3D NAND and NOR. This isn’t so simple, though. In comparison to today’s flash, ReRAM uses new and different materials, many of which are challenging to bring into production. The ReRAM architectures themselves can be subdivided into three basic categories—embedded, 2D and 3D. Within the 3D category, there are two types of ReRAM—cross-point array and vertical.

In July, Panasonic shipped the world’s first ReRAM, which is geared for the embedded market. The company integrated a 180nm ReRAM device with an 8-bit controller and other blocks. The microcontroller is aimed for blood-pressure meters, fire alarms, electronic passports and other embedded applications.

The more complex ReRAMs are standalone parts designed to replace NAND and NOR. Two ReRAM types—the 2D as well as the 3D-based cross-point array—are based on memory cells with leading-edge design rules. “They will require advanced lithography,” said Gill Lee, a senior director and principal member of the technical staff at Applied Materials.

Vertical ReRAM is more like 3D NAND, Lee said. In both cases, the vertical stacks are not driven by aggressive scaling, but rather the layers are constructed using high-aspect ratio etch and deposition techniques. “They both avoid using leading-edge lithography,” Lee said.

“I see two different directions for ReRAM. The first one is for embedded, where the densities are not too high,” Lee added. “For storage, more than a dozen companies have exhibited products with ReRAM properties. But no one really has a ReRAM product (for storage) yet. Demonstrating a ReRAM is not a problem at all. Making billions of ReRAM devices that are reliable and economical is difficult. So far, I don’t think anyone has demonstrated that yet.”

In addition, ReRAM is always playing a game of catch-up. NAND continues to set the bar high in terms of density and cost. Even with the projected densities, ReRAM can’t keep up in the cost-per-bit curve against NAND, he added. The other issues for ReRAM include sneak path leakage, parasitic capacitance and line resistance. The ability to integrate the ReRAM materials with CMOS is also a challenge.

How to make a vertical ReRAM
Still, there are some promising ReRAM architectures. Imec, Macronix, Samsung and Stanford are separately developing vertical ReRAM. Generally, a vertical ReRAM resembles a skyscraper. The structure consists of several floors or horizontal planes. The planes are intersected by vertical beams or pillar structures, which serve as the interconnects between the layers.

Each pillar consists of a vertical transistor. For its part, Stanford is proposing a ReRAM electrode cell using titanium nitride (TiN), with hafnium oxide (HfO) serving as the barrier layer. “We’ve scaled the electrode thickness from 25nm down to 5nm without any change in our process flow,” said Henry Chen, a research assistant at Stanford.

Stanford uses a multi-step process flow to make the ReRAM cell. “First, multiple platinum and silicon dioxide layers are deposited by PECVD and an e-beam evaporator, respectively. A trench is etched down to a silicon oxide layer by two etch steps. Next, hafnium oxide is deposited by ALD to conformally cover the sidewall of the trench. Then, TiN is used to fill up the trench as the pillar electrode,” he said. “The plane electrode is accessed through dry etching. So, the ReRAM cell is located at the sidewall of the trench.’’

Another type of 3D ReRAM makes use of a stacked cross-point array. For example, the SanDisk-Toshiba duo recently disclosed a 32-Gbit ReRAM test chip, based on a 24nm process and a cross-point architecture. The companies hope to scale the technology, enabling 1- and 4-terabit devices by the latter half of the decade. To scale the device, the industry will require leading-edge lithography like extreme ultraviolet (EUV), said Ritu Shrivastava, vice president of technology at SanDisk. “We are using (the test chip) to learn how to shrink the device and have it ready when the time comes,” Shrivastava said.

Another ReRAM vendor, Crossbar, is taking another approach with a proprietary cross-point architecture. The resistance switching mechanism itself is based on the formation of a silver filament in the material. Initially, Crossbar is going after the “NOR replacement” market, which doesn’t require leading-edge processes, said George Minassian, chief executive of Crossbar. “Our cell can be scaled as small as 10nm,” Minassian said. “But we’re shooting for 65nm (in the beginning).”

Crossbar has developed working parts at an undisclosed fab. Initially, the company plans to license the IP. The technology is expected to appear in the next two or so years.

Other companies are developing planar ReRAM devices, including Adesto, Micron-Sony, SK Hynix-HP and others. The industry is keeping a close eye on SK Hynix and Hewlett-Packard, which have been jointly working on commercializing HP’s memristor technology by 2015. A form of ReRAM, memristor is a passive two-terminal electronic device. In memristance, if the flow of a charge is stopped by turning off the applied voltage, this component will remember its last resistance. So far, though, SK Hynix has only demonstrated a 2-Mbit device, meaning the company has a long ways to go before commercializing the memristor.

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