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DRAM’s Persistent Threat To Chip Security


A well-known DRAM vulnerability called "rowhammer," which allows an assailant to disrupt or take control of a system, continues to haunt the chip industry. Solutions have been tried, and new ones are being proposed, but the potential for a major attack persists. First discovered some five years ago, most of the efforts to eliminate the "rowhammer" threat have done little more than mitigate t... » read more

Manufacturing Bits: Feb. 2


Capacitor-less DRAM At the recent 2020 International Electron Devices Meeting (IEDM), Imec presented a paper on a novel capacitor-less DRAM cell architecture. DRAM is used for main memory in systems, and today’s most advanced devices are based on roughly 18nm to 15nm processes. The physical limit for DRAM is somewhere around 10nm. DRAM itself is based on a one-transistor, one-capacito... » read more

DRAM, 3D NAND Face New Challenges


It’s been a topsy-turvy period for the memory market, and it's not over. So far in 2020, demand has been slightly better than expected for the two main memory types — 3D NAND and DRAM. But now there is some uncertainty in the market amid a slowdown, inventory issues and an ongoing trade war. In addition, the 3D NAND market is moving toward a new technology generation, but some are enc... » read more

What Happened To Execute-in-Place?


Executing code directly from non-volatile memory, where it is stored, greatly simplifies compute architectures — especially for simple embedded devices like microcontrollers (MCUs). However, the divergence of memory and logic processes has made that nearly impossible today. The term “execute-in-place,” or ”XIP,” originated with the embedded NOR memory in MCUs that made XIP viable. ... » read more

Power/Performance Bits: Aug. 25


AI architecture optimization Researchers at Rice University, Stanford University, University of California Santa Barbara, and Texas A&M University proposed two complementary methods for optimizing data-centric processing. The first, called TIMELY, is an architecture developed for “processing-in-memory” (PIM). A promising PIM platform is resistive random access memory, or ReRAM. Whil... » read more

Startup Funding: July 2020


A number of semiconductor and design companies took in funding this month, from a mega round for a data center switch maker to seed grants for two Canadian companies and new funding for an IP marketplace. China continues to be a hot area for electric vehicles, with one company raising half a billion for its two models currently in production. For July, we highlight fifteen startups that raised ... » read more

Manufacturing Bits: July 21


Intel’s next-gen MRAM At the recent 2020 Symposia on VLSI Technology and Circuits, Intel presented a paper on a CMOS-compatible spin-orbit torque MRAM (SOT-MRAM) device. Still in R&D, SOT-MRAM is a next-generation MRAM designed to replace SRAM. Generally, processors integrate a CPU, SRAM and a variety of other functions. SRAM stores instructions that are rapidly needed by the processo... » read more

Challenges For Compute-In-Memory Accelerators


A compute-in-memory (CIM) accelerator does not simply replace conventional logic. It's a lot more complicated than that. Regardless of the memory technology, the accelerator redefines the latency and energy consumption characteristics of the system as a whole. When the accelerator is built from noisy, low-precision computational elements, the situation becomes even more complex. Tzu-Hsian... » read more

Neuromorphic Computing Drives The Landscape Of Emerging Memories For Artificial Intelligence SoCs


The pace of deep machine learning and artificial intelligence (AI) is changing the world of computing at all levels of hardware architecture, software, chip manufacturing, and system packaging. Two major developments have opened the doors to implementing new techniques in machine learning. First, vast amounts of data, i.e., “Big Data,” are available for systems to process. Second, advanced ... » read more

Compute-In Memory Accelerators Up-End Network Design Tradeoffs


An explosion in the amount of data, coupled with the negative impact on performance and power for moving that data, is rekindling interest around in-memory processing as an alternative to moving data back and forth between the memory and the processor. Compute-in-memory (CIM) arrays based on either conventional memory elements like DRAM and NAND flash, as well as emerging non-volatile memori... » read more

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