November 2014 - Page 4 of 10 - Semiconductor Engineering

System Bits: Nov. 18
By Ann Mutschler - 18 Nov, 2014 - Comments: 0

Phase transitions between liquid, gas Researchers from the University of Tokyo and Tokyo Institute of Technology reminded that materials change their form between three states -- solid, liquid, and gas -- depending on factors such as temperature and pressure. However, a phase transition does not necessarily occur between liquid and gas, and they can continuously transform from the one to the o... » read more

Design Rules Explode At New Nodes
By Ed Sperling - 17 Nov, 2014 - Comments: 0

Semiconductor Engineering sat down changing design rules with Sergey Shumarayev, senior director of custom IP design at Altera; Luigi Capodieci, R&D fellow at [getentity id="22819" comment="GlobalFoundries"]; Michael White, director of product marketing for Calibre Physical Verification at [getentity id="22017" e_name="Mentor Graphics"], and Coby Zelnik, CEO of [getentity id="22478" e_name=... » read more

Photoresist Problems Ahead
By Ann Mutschler - 14 Nov, 2014 - Comments: 2

As the semiconductor industry begins its ramp to manufacturing at 10nm and below, activity is heating up involving lithography modeling. The goal is to be ready when all the pieces of the puzzle are in place. That includes [gettech id="31045" comment="EUV"], when it finally becomes commercially viable, as well as extending ArF [getkc id="80" comment="lithography"]. When it comes to lithogra... » read more

Week 23: ICCAD, The Kaufman Award And The DAC Exhibitor Meeting
By Anne Cirkel - 14 Nov, 2014 - Comments: 0

It was another week of travel though this time I stayed on schedule – no missed flights! I was in San Jose for several days during which I briefly crossed paths with two EDA stars. Their work suggests that the present and future of our industry is in good shape. And I was there to host a meeting for those exhibiting at DAC, which, if you’ll excuse the pun, will be an even better place to sh... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 14 Nov, 2014 - Comments: 0

Intel’s McAfee unit announced its annual “12 Scams of the Holidays” list to educate the public on the most popular ways cybercriminals scam consumers during the holiday season. The German government has cleared Applied Materials’ proposed acquisition of Tokyo Electron Ltd. (TEL). The merger is still under examination by the competition authorities in the U.S., South Korea, Japan, Tai... » read more

The Week In Review: Design/IoT
By Ed Sperling - 14 Nov, 2014 - Comments: 0

An Intel study conducted by TNS showed that tech gadgets topped the holiday gift list this year, including tablets, laptops and smart phones. The study also found that 60% of Americans peeked at their holiday gifts as kids, and 25% still look. Deals Mentor Graphics added Macnica Americas as a distributor for its simulator, functional verification and PCB simulation and analysis tools. So... » read more

We Have Reached The Tipping Point For Simulation-Based Mask Data Preparation
By Aki Fujimura - 13 Nov, 2014 - Comments: 0

Since the beginning of the semiconductor industry, mask-data preparation (MDP) and mask verification (MV) have been shape-based: each shape has been treated as an entity unto itself, and if each isolated shape was correct, the mask was correct. This context independence is a critical assumption for conventional fracturing. However, as line/space measurements (L:S) fall below 50nm, shape-ba... » read more

Future Directions Unknown
By Ed Sperling - 13 Nov, 2014 - Comments: 0

The semiconductor industry has been on cruise control when it comes to shrinking features, but as process technology progresses to 10nm and 7nm there will be some significant changes. For one thing, the cost per new design will continue to rise, which means only the largest companies with the biggest market opportunity will be able to invest at the leading-edge nodes. Chips for mobile phones... » read more

Fill Database Management Strategies At Advanced Nodes
By Jeff Wilson - 13 Nov, 2014 - Comments: 0

Fill has been around for many nodes, and was originally introduced to improve manufacturing results. The foundries learned that by managing density they were able to reduce wafer thickness variations created during chemical-mechanical polishing (CMP) processes, so they introduced density design rule checks (DRC). To meet these density requirements, designers “filled” open areas of the layou... » read more

Transistor Options Narrow For 7nm
By Mark LaPedus - 13 Nov, 2014 - Comments: 0

Chipmakers are currently ramping up silicon-based finFETs at the 16nm/14nm node, with plans to scale the same technology to 10nm. Now, the industry is focusing on the transistor options for 7nm and beyond. At one time, the leading contenders involved several next-generation transistor types. At present, the industry is narrowing down the options and one technology is taking a surprising lea... » read more

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