ADAS Further Extends 7nm Challenges

As we discussed previously on the LPHP blog, 7nm nodes hold great promise for reducing power, improving performance and increasing density for next-generation chips, but also present a set of engineering challenges. When you factor in the standards set for autonomous vehicles (AV) and advanced driver assistance systems (ADAS) system-on-chips or SoCs, those challenges can more than double. Automakers are meeting consumer demands for greater functionality and capabilities. But, those demands fall squarely on chipmakers to advance their technologies to meet greater reliability and complexity requirements. These leading-edge requirements aren’t found in other consumer electronics.

When you mix these automotive requirements with the signal integrity and manufacturing complexity of 7nm, design challenges increase significantly. The 7nm IP core and the SoC it’s embedded in must be in compliance with various automotive standards in order to be automotive qualified. Those standards are: the ISO 26262 functional safety for Road Vehicles Standard, Automotive Electronics Council (AEC)-Q100 Reliability Standard, and the automotive safety packages with failure modes, effects, and diagnostic analysis (FMEDA) reports. Additionally, the ISO 26262 Standard defines a risk classification arrangement known as the Automotive Safety Integrity Level (ASIL) for 7nm IP cores. The stringent requirements are in part due to the reliability concerns, the nature of the environment that cars are used in, and the particular location within the car that the SOC is used in. For example, a device that is used in the engine will have much stricter ISO 26262 and AEC-Q100 reliability standards to follow versus a device placed in the in-car infotainment system. Also, in contrast to consumer electronics, cars tend to last well over 10 years and need to work reliably in harsh environments ranging from extreme heat to extreme cold weather.

ISO 26262 covers a wide range of functional safety requirements and details the “what and how” an IP core and the SoC it’s embedded in need to perform for compliance. It goes into specifications, design implementation, integration, verification, validation, and so on.

Within the standard, there’s the ASIL classification scheme with A, B, C, and D labels with D specifying the top product integrity requirements. Here, the emphasis is on defining safety requirements essential to be in agreement with ISO 26262.

Then, there are the AEC-Q100 Reliability Standard and FMEDA. The AEC Standard covers failure mechanism-based stress test qualification for packaged ICs. Its purpose, as the document clearly states, “is to determine that a device is capable of passing specified stress tests, and thus can be expected to give a certain level of quality/reliability in the application.” In particular, AEC-Q100 involves MIL-STD-883 test methods and procedures for microelectronics.

Lastly, FMEDA is an organized way to check out a component’s failure modes, failure rates, and diagnostic capabilities.

In conclusion, in order to be automotive qualified, engineers must be cognizant of the extra set of checklists needed to be met when designing 7nm IP cores.