Advanced packaging is expected to exceed the mainstream segment for the first time by 2027.
For the semiconductor industry, 2022 was a very interesting year. On one hand, it witnessed shortages in the supply chain. On the other hand, the macro-economic situation turned and demand for several consumer and computing devices plummeted. A trade war with China and ensuing localization of supply chain with passage of CHIPS act took shape in 2022. The auto industry is still recovering from the effects of disruptions. Growth of the electric vehicle (EV) segment is encouraging and at the same time, challenging for the industry.
The semiconductor packaging market continues to grow and is expected to reach $118B by 2027 with 6.6% compound annual growth rate (CAGR) from 21-27, see figure 1. This market is generally divided into mainstream and advanced packaging segments with the latter expected to exceed the mainstream segment for the first time by 2027.
Fig. 1: Advanced packaging vs. traditional packaging market forecast (2020-2027). Source: [1].
This growth is driven by continued expansion of data centers, adoption of EVs, and expansion of 5G and artificial intelligence (AI). There are headwinds with the rising interest rates and drop in consumer spending that are impacting sales of personal computers (PCs), smartphones and gaming devices. The overall sentiment is that these headwinds are transitionary, and growth will resume once macro-economic conditions settle down. The general trend in the market is towards increasing semiconductor content in new products, devices becoming smart and connected, and increased use of outsourced services.
Even though outsourced semiconductor assembly and test (OSAT) suppliers do not directly deal with consumers, they are not immune to overall market conditions. For 2023, most of the OSATs have announced capital expenditure (CapEx) reductions. As demand stabilizes and new fabs come online, we expect CapEx and manufacturing activity to grow in 2024. Lead times associated with substrates have already started to come down, which is a good sign for a healthy semiconductor industry.
The last few years saw the acceleration of cloud-based applications because of the pandemic. Many people grew accustomed to working from home, attending classes from home, entertaining at home or shopping from home. All these functions rely on cloud-based applications. This resulted in more than 30% growth of data center CapEx over the last two years. Video applications have exploded with social media platforms. New cars coming to the market are also connected to the cloud for software updates. Many of these applications require high performance computing and very low latency. This is forcing chip designers to investigate new techniques, such as heterogeneous integration (HI) and chiplet architectures to solve some of the challenges related to performance, power and cost.
In the 90’s there was a movement towards building a system on a chip (SoC) when chip designers tried to put all the different building blocks on the motherboard into one chip to improve the system performance. Over time that resulted in very large die sizes. Moving forward, these large die sizes are approaching the size of the reticle. Heterogeneous integration or chiplet architectures helps reduce the individual die sizes and at the same time, maintain performance and improve the yield for a lower total cost.
The Universal Chiplet Interconnect Express (UCIe) consortium is proposing to standardize chiplet interconnects throughout the industry. Some of the largest semiconductor suppliers have joined this consortium and are working together so that chips from different suppliers can be put in the same package and function as designed. With this effort, the chiplet architecture should continue to become more common in coming years [2].
Fig. 2: UCIe heterogeneous integration with chiplets [2].
Heterogeneous integration most often involves assembling several different dies using 2.5D and 3D packaging technologies. Many foundries offer these packaging technologies, where they can integrate several of their own dies in single package. OSATs also have similar solutions, where they can assemble dies from different foundries. The added advantage of using a 3rd party OSAT is that they may already be working with different foundries and have established intellectual property (IP) protections in place. Amkor has SWIFT, S-SWIFT, and S-Connect technologies for different forms of heterogeneous integration solutions.
Fig. 3: Amkor’s S-Connect technology.
The mobile market has stalled in recent years with the total number of smartphones shipped declining between 3-4% in 2022. The China market was severely impacted by pandemic-related shutdowns. Even though the total number of smartphones did not grow, 5G adoption continued to rise. According to GfK, a provider of consumer goods data and intelligence, roughly 625M 5G-enabled smartphones were sold in 2022.
The driving forces for the 5th generation New Radio (NR), or simply 5G technology, include faster transmission of large data as well as the need for more reliable connections, quicker response time (low latency) and better coverage. For mmWave applications, signal loss becomes critical, and the design challenges increase in complexity. In addition to emerging 5G smartphones, other applications that operate at very high frequencies demand a small size include small cells and radar units in autonomous vehicles and numerous Internet of Things (IoT) appliances.
With the rise of 5G wireless technology, cellular frequency bands have increased considerably, requiring innovative solutions for the packaging of radio frequency (RF) front-end (RFFE) modules for smartphones and other 5G-enabled devices. Amkor’s Double Sided Molded Ball Grid Array (DSMBGA) package is an example of such solutions, see figure 4. Double-sided packaging technology has vastly increased the level of integration for RF front-end modules used in smartphones and mobile devices.
Fig. 4: A Double Sided Molded Ball Grid Array package.
Instead of a separate power amp (PA), low-noise amplifier (LNA), switches, transceivers, filters and a discrete antenna, today’s fully integrated mmWave RFFE module is completely achieved with antenna in package (AiP) technology in a System in Package (SiP) design. The integration is accomplished using a variety of technologies, including double-sided assembly, advanced wafer-level redistribution layer (RDL) design, passive component integration and sophisticated RF shielding techniques to provide the most advanced 5G package solutions available today [3]. The DSMBGA package shown in figure 4 is extensively used for wearable devices and applications that require very small form factor.
In addition to the reduced size required for handheld and other small mmWave devices, AiP design provides improved signal integrity with reduced signal attenuation and addresses the range and propagation challenges that occur at higher frequencies.
In the automotive space, electrification, advanced driver assistance systems (ADAS), and new infotainment systems offer significant new opportunities for packaging and innovation. The increase in sales of EVs is putting new demands on automotive electrical systems. EVs are expected to grow from about 3M units per year in 2020 to about 13M units per year in 2023 [4]. This translates to about 30% growth for EV/HEV related semiconductors. As a result of this growth, architectures such as 48V ecosystem are being developed and deployed to meet various objectives, such as high efficiency for battery systems for a longer range. The higher the degree of electrification, comfort features and advanced driver assistance systems in a car, the higher the need for the total power budget. These new systems result in higher power density, lower distribution losses (I2R losses), higher efficiency, increased deployment flexibility and greater cost-effectiveness.
Newer semiconductor materials, such as gallium nitride (GaN) and silicon carbide (SiC), have entered the market space offering better performance. However, to realize full system benefits, packaging technologies need to keep up and not limit achievable electrical and thermal benefits. Power device packaging has evolved from through-hole packages to surface mount components with leads, such as D2PAK, DPAK and SO-8. Today, leaded packages are being replaced with lead-less surface mount options such as the TO leadless (TOLL) and Power Quad Flat No-Lead (PQFN). For example, in an EV the inverter stage to drive the motor uses MOSFETs rated higher than 48V while the currents are more than 500A. Generally, multiple MOSFETs are used in parallel to meet the full power requirement. The TOLL package (figure 5) offers 30% smaller dimensions and is more than 50% smaller form-fit allowing compact designs, high current capability and low thermal resistance (RthJC) [5].
Fig. 5: D2PAK 7L vs. TOLL power packages.
Many of these system-level solutions require multiple dies in a package. OSATs are using their experience in other market segments such as high-performance computing and networking to bring innovative solutions to market with higher levels of reliability at the board level, mandated by automotive original equipment manufacturers (OEMs).
The economic headwinds in 2023 may be transitionary and growth will resume once macro-economic conditions settle down. The larger industry trends related to high performance computing, cloud-based applications, electrification in automobiles and adoption of 5G technology still remain intact. These new technologies bring several challenges related to increased performance, signal integrity, heat dissipation and die sizes.
The use of chiplets for heterogeneous integration, DSMBGA packages for 5G applications and TOLL packages for vehicle electrification are some of the solutions available in the market today. For other possible solutions to tackle the hurdles of new technologies, OSAT and OEM involvement at an early design stage will be required. By working together, concerns about supply chain and localization of manufacturing can be addressed.
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