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Jesse Allen

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Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

Author's Latest Posts

Week In Review: Design, Low Power
By Jesse Allen - 20 Dec, 2019 - Comments: 0

M&A Intel acquired Habana Labs, a maker of programmable deep learning accelerators for the data center, for approximately $2 billion. Based in Israel, Habana was founded in 2016 but only emerged from stealth in September 2018 with the release of its first inference chip. Intel's VC arm, Intel Capital, previously invested in the startup. Intel has made numerous M&A moves in the AI space... » read more

Blog Review: Dec. 18
By Jesse Allen - 18 Dec, 2019 - Comments: 0

Lam Research's David Haynes finds that taking advances made at 300mm and applying them via upgrades to 200mm equipment is a cost appropriate strategy to quickly improve yield and add capacity. Synopsys' Taylor Armerding looks at which of this year's many data breaches hit corporate wallets the hardest and how the cost of privacy noncompliance is expected to rise with California's CCPA and st... » read more

Power/Performance Bits: Dec. 16
By Jesse Allen - 16 Dec, 2019 - Comments: 0

Carbon nanotubes for RF Researchers at Carbonics, Inc., University of Southern California, and King Abdulaziz City for Science and Technology, funded by the Army Research Office, propose using carbon nanotubes for radio frequency applications. The team's carbon nanotube device beat traditional RF-CMOS technology, achieved speeds exceeding 100GHz. This could boost mmWave, which in turn would... » read more

Week In Review: Design, Low Power
By Jesse Allen - 13 Dec, 2019 - Comments: 0

Rambus finalized its acquisition of the silicon IP, secure protocols and provisioning business from Verimatrix, formerly Inside Secure, for $45 million at closing, and up to an additional $20 million, subject to certain revenue targets in 2020. RISC-V SiFive unveiled two new product families. The SiFive Apex processor cores target mission-critical processors with Size, Weight, and Power (SW... » read more

Blog Review: Dec. 11
By Jesse Allen - 11 Dec, 2019 - Comments: 0

Arm's Urmish Thakker investigates ways to make recurrent neural networks run on resource constrained devices with limited cache and compute resources by reducing the number of RNN computations, without the need to retrain the original RNN model. Mentor's Brent Klingforth digs into the challenges of designing rigid-flex PCBs and how advanced capabilities in modern tools, like awareness of sta... » read more

Power/Performance Bits: Dec. 9
By Jesse Allen - 09 Dec, 2019 - Comments: 0

Solar capture and storage Researchers at the University of Houston developed a device capable of both capturing and storing solar energy. Unlike solar panels and solar cells, which rely on photovoltaic technology for the direct generation of electricity, the hybrid device captures heat from the sun and stores it as thermal energy. The device combines molecular energy storage and latent heat... » read more

Week In Review: Design, Low Power
By Jesse Allen - 06 Dec, 2019 - Comments: 0

Cadence signed a deal to buy National Instruments’ AWR business unit for about $160 million in cash, a move that Cadence describes as a way to broaden its market into intelligent system design. AWR’s strength is high-frequency RF design automation tools, particularly in the millimeter wave and microwave spectrums, which are critical for radar and 5G. It also has technology for III-V materia... » read more

Blog Review: Dec. 4
By Jesse Allen - 04 Dec, 2019 - Comments: 0

Arm's Rupal Gandhi digs into the Cell-Aware Test methodology to deterministically target the growing number of defects that occur within the cells, the process of CAT library generation, and compares the static and transition patterns generated. Cadence's Paul McLellan shares highlights from the recent WOSET event with a look at the big drivers for the current interest in open-source EDA too... » read more

Power/Performance Bits: Dec. 3
By Jesse Allen - 03 Dec, 2019 - Comments: 0

Waking up IoT devices Researchers at UC San Diego developed an ultra-low power wake-up receiver chip that aims to reduce the power consumption of sensors, wearables, and Internet of Things devices that only need to communicate information periodically. "The problem now is that these devices do not know exactly when to synchronize with the network, so they periodically wake up to do this eve... » read more

Week In Review: Design, Low Power
By Jesse Allen - 29 Nov, 2019 - Comments: 0

Aldec launched the HES-MPF500-M2S150 Development Kit for early co-development and co-verification of hardware and software for FPGA-based embedded systems that will use devices from either or both of Microchip’s PolarFire or SmartFusion2 families. The HES-MPF500-M2S150 Development Kit features Microchip’s low power PolarFire MPF500T FCG1152 FPGA, which has 481k logic elements, 1480 math blo... » read more

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