Compact model for MRAM; SystemVerilog class variables; heterogeneous architectures; EMI in the data center.
Arm’s Fernando Garcia Redondo, Pranay Prabhat, and Mudit Bhargava introduce an open source framework and compact model for the simulation, characterization, and analysis of MRAM magnetic tunnel junctions.
Siemens EDA’s Chris Spear continues the tutorial on SystemVerilog class variables with a look at how to use the $cast() system task to copy between base and derived class variables.
Synopsys’ Rich Collins and Markus Willems consider what’s driving specialized, heterogenous processor architectures and the particular challenges for programmability and tooling.
Cadence’s Paul McLellan checks out a new book about electromagnetic interference and thermal analysis with a focus on data centers and the transition from relatively low-speed parallel interfaces to high-speed serial interfaces.
The ESD Alliance’s Bob Smith chats with Ansys’ John Lee, Rich Goldman, and Marc Swinnen about the changing market dynamics brought on by systems companies building company-specific custom silicon and the importance of multiphysics analysis in designing 3D ICs.
Coventor’s Hideyuki Maekoba checks out how Analog Devices models the effect of package stress on the performance of a gyroscope by coupling package stress to multiphysics transducer models.
Ansys’ Marc Swinnen finds that multiphysics analysis will be an increasingly important part of semiconductor design as 3D packaging requires careful attention to thermal and electromagnetic effects.
Memory blogger Ron Neale digs into Weebit Nano’s recently announced ReRAM memory array based on SiO and an Ovonic Threshold Switch selector to understand its inner workings.
Intel’s Jason Kimrey provides an overview of the company’s latest announcements, including what’s coming for client products, in the data center, and its OneAPI programming language that aims to improve application performance across multiple CPUs, GPUs, FPGAs and other accelerators.
Marvell’s Radha Nagarajan shares details of an optical interconnect for the data center using a silicon photonics substrate with the optical components, 2.5D heterogeneously integrated with InP DFB lasers, and modulator driver and transimpedance amplifier made using SiGe technology.
And don’t miss the blogs featured in the latest Manufacturing, Packaging & Materials newsletter:
Executive Editor Mark LaPedus talks with Semico Research’s CEO about changes in the memory biz.
Coventor’s Michael Hargrove looks at how nanosheets stack up to finFETs.
Calibra’s Jan Willis examines the use of variable-shape e-beam (VSB) photomask writers in writing curvilinear shapes.
JCET’s Ken Hsiao lays out different fan-out options and benefits for different applications.
Lam Research’s David Haynes traces the impact of specialty technologies such as MEMS, CMOS image sensors, and RF devices on everything from smartphones to COVID-19 testing.
Amkor’s Curtis Zwenger finds a growing number of new frequencies and multiplexing methods have increased the complexity of the RF front end.
TechInsights’ Jeongdong Choe tears down 176L 3D NAND to reveal changes as the number of layers increase.
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