Blog Review: Dec. 14

FPGA language adoption; second-life batteries; chip security strategies; CXL.


Siemens EDA’s Harry Foster checks out design and verification language adoption trends in FPGA projects, including testbench methodologies and assertion languages.

Cadence’s Veena Parthan finds that giving electric vehicle batteries a second life as energy storage devices can extend their useful life by 5 to 8 years, but a lack of standardization in EV batteries poses challenges.

Synopsys’ Ian Land shares five strategies that can help protect chip designs from security threats, including following standards-based principles and minimizing attack surfaces.

A Rambus writer answers more questions about CXL, including the importance of memory coherence, the expected impact on memory demand, bandwidth versus capacity, and long-term implications for the RDIMM market.

Arm’s Sandeep Mistry looks at how the Matter specification can make it easier for developers other than embedded experts to produce home automation services, and provides a tutorial using just a Raspberry Pi and Python.

Renesas’ Graeme Clark takes a look at the Data Transfer Controller (DTC), a simple but flexible mechanism to transfer data between a peripheral and memory or memory and a peripheral using a programmable controller rather than a large, dedicated hardware block.

Ansys’ Wim Slagter finds that HPC enables finite element analysis (FEA) users to increase the fidelity of their simulations, tackle whole assemblies, do more nonlinear analyses, evaluate more design scenarios, and conduct large scale optimization studies.

Riscure’s Jasper van Woudenberg finds out how Intel uses tunable replica circuits as a fault injection countermeasure at scale.

The ESD Alliance’s Bob Smith chats with Handel Jones of IBS about why China is ahead of the U.S. when it comes to AI technologies and why AI is a key component of cybersecurity.

Memory analyst Jim Handy expects the market for new memory technologies will continue to develop, but at a slower pace, with the bulk of revenue growth going to memories embedded into SoCs.

Western Digital’s Thomas Ebrahimi notes that every step of autonomous vehicle development has been met with obstacles surrounding data, whether it be training machine learning models or reading/writing data quick enough for vehicles to respond.

And check out the blogs featured in the latest Low Power-High Performance newsletter:

Siemens EDA’s Anthony Mastroianni and Gordon Allan explain why achieving the full potential of 3D-IC requires front-end design approaches that enable evaluation of different microarchitectures.

Fraunhofer IIS EAS’ Andy Heinig contends that chiplets are a better choice for many applications than monolithic designs.

Rambus’ Frank Ferro warns that AI and ML are stretching current data center memory infrastructures to their limit.’s Steve Roddy observes that fallback is a dirty word.

Arm’s Neil Fletcher presents technical capabilities that could make smartphones appealing but still affordable for consumers in emerging economies.

Synopsys’ Pavani Jella warns that finding SIPI problems in the bring-up lab is far too late.

Cadence’s Paul McLellan shows why routing is a primary bottleneck in laying out today’s advanced packages.

Ansys’ Scott Wilkins focuses on the search for lightweight polymers that can withstand the temperatures of an automotive environment.

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