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Blog Review: Aug. 3


Siemens' Patrick Hope explains the growing importance of choosing the right laminate for PCB designs and how to read a material datasheet to compare important electrical, thermal, and mechanical properties. Synopsys' Yankin Tanurhan argues that as the number of sensors being integrated in automotive systems increases to enable new ADAS and autonomy capabilities, building security and quality... » read more

Week In Review: Design, Low Power


Tools & IP MIPS announced its first products based on the RISC-V ISA. The eVocore IP cores are designed to provide a flexible foundation for heterogeneous compute, supporting combinations of eVocore processors as well as other accelerators, with a Coherence Manager that maintains L2 cache and system-level coherency between all cores, main memory, and I/O devices. They target high-performan... » read more

Week In Review: Manufacturing, Test


The U.S. Senate approved the 2022 America COMPETES act, which has big ramifications for the chip industry. The bill now heads to the House for further reconciliation. If approved, it would provide more than $50 billion in U.S. subsidies for semiconductor chip manufacturing. The SIAC (Semiconductor In America Coalition) urged Congress to act promptly to achieve a bipartisan compromise soon and o... » read more

Week In Review: Design, Low Power


Tools Synopsys introduced a new model for using its EDA tools on the cloud. Synopsys Cloud provides pay-as-you-go access to the company's cloud-optimized design and verification products, with pre-optimized infrastructure on Microsoft Azure to address higher levels of interdependencies in chip development. "As more design flows incorporate AI, requiring even more resources, the virtually unlim... » read more

Week In Review: Manufacturing, Test


Fab tools Lam Research has rolled out a new suite of selective etch products for use in developing next-generation technologies, such as gate-all-around (GAA) transistors. In the fab, selective etch helps chipmakers with complex structures. These etch tools provide selective and precision etching without modifying or causing damage to other critical material layers. Composed of three new... » read more

Greener Design Verification


Chip designs are optimized for lower cost, better performance, or lower power. The same cannot be said about verification, where today very little effort is spent on reducing execution cost, run time, or power consumption. Admittedly, one is a per unit cost while the other is a development cost, but could the industry be doing more to make development greener? It can take days for regression... » read more

Blog Review: Nov. 17


In a podcast, Arm's Geof Wheelwright and Hilary Tam chat about the importance of efforts to decarbonize compute and how low-power compute can help ensure that the benefits of technology outweigh the environmental cost. Synopsys' Graham Allan and Vikas Gautam consider what's driving demand for HBM3, what's different from the previous HBM2E specification, unique design considerations, and how ... » read more

Week In Review: Manufacturing, Test


Chipmakers AMD has rolled out its new MI200 series products, the first exascale-class GPU accelerators. Using a fan-out bridge packaging technology, the MI200 series are designed for high-performance computing (HPC) and artificial intelligence (AI) applications. The MI200 series accelerators feature a multi-die GPU architecture with 128GB of HBM2e memory. Typically, the HBM2e memory stack a... » read more

Blog Review: Oct. 27


Siemens EDA's Ray Salemi continues looking into using Python for verification by looking at how pyuvm simplifies and refactors the UVM TLM system to take advantage of the fact that Python has multiple inheritance and no typing. Cadence's Paul McLellan listens in as Larry Disenhof explains the impact that export regulations have on EDA tools and IP products and changes in a rapidly shifting l... » read more

Blog Review: Oct. 20


Siemens EDA's Sumit Vishwakarma promotes ironing out preliminary bugs by using a real number model to describe an analog block as a discrete floating-point model and enable it to simulate in a digital solver at near-digital simulation speeds. Synopsys' Taylor Armerding explains how including security in the software development process from the beginning planning stages onward will help IoT ... » read more

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