Blog Review: March 18

FPGA verification effort; rethinking required; integrating uvm_reg with AXI VIP; the Hyperloop railway; BBC Micro idea returns; 35 years of electronics; IoT Enigma; pancake creativity; smart shoes; parking problems; art or science?; most ubiquitous software.


How do you quantify effort spent in FPGA verification? Mentor’s Harry Foster tackles the question in his latest installment of the Wilson Research Group functional verification study.

A new frontier of design challenges is rapidly emerging, according to ARM CEO Simon Segars. Cadence’s Brian Fuller brings us his keynote address at CDNLive.

Synopsys’ Tushar Mattu is back with more on AXI VIP. If you found his previous tutorial useful, take a look at this video on effectively integrating uvm_reg.

A revolutionary new mode of transportation, rejected as too theoretical, too expensive, the stuff of fiction: Ansys’ Sandeep Sovani takes a ride back to the 19th century, when the possibility of a Transcontinental Railroad looked a lot like the Hyperloop today.

The history lessons continue with ARM’s Gary Atkinson. Remember the BBC Micro? The thirty year old partnership between Acorn and the BBC is returning to teach kids to code today.

A Lam Research staff writer joins the walk down memory lane with a look back at 35 years of microchips and the consumer electronics they helped create.

Following up on a recent SemiEng article, Rambus’ Aharon Etengoff talks with Cryptography Research president Paul Kocher on what IoT security needs to learn from the Enigma machine.

Ansys’ Justin Nescott looks forward to the day when pancake creativity runs free. Also in his top engineering picks of the week, an injectable polymer could save injured soldiers and trauma patients while space breaks bring satellites safely home.

If your foot is tingling, maybe it’s fallen asleep—or maybe your shoes are giving directions to London, where ARM’s David Maidment checked out new devices at the Wearable Technology Show.

Synopsys’ Michael Posner was in London as well, but it wasn’t navigation that gave him trouble. Or perhaps his parking problems were just a cover for the secretive Flying Car Expo.

Should verification be an art or a science? Cadence’s Richard Goering listens in on a DVCon panel moderated by Brian Bailey.

Mentor’s Colin Walls is on a search for the Most Ubiquitous Software. Is Microsoft Word used on the Space Shuttle?

And in case you missed last week’s Low Power-High Performance newsletter, here are some noteworthy blogs:

Editor in Chief Ed Sperling contends that without a comprehensive data management policy, improvements in technology will be meaningless.

Executive Editor Ann Steffora Mutschler questions which came first, the technology or the push by the auto industry?

Mentor’s Mick Tegethoff and David Lee dig into high-performance analog and RF circuits, where designers are facing quantitative and qualitative challenges that didn’t exist a few years ago.

Synopsys’ Alan Gibbons observes that virtual prototyping with UPF 3.0-based IP power models can create a comprehensive mechanism for early detection and correction of system power management issues.

Cadence’s Brian Fuller looks at what object-based audio means for system design.

Atrenta’s Ravindra Aneja argues that if functional CDC issues haven’t stalled your designs yet, you’ve been lucky. They probably will in the future.

Ansys’ Chris Ortiz explains that power integrity requires accurate modeling of voltage variation across die and efficient coupling between chip/package layouts.

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