Blog Review: Oct. 5

Evaluating new interconnects; 3D IC potential; SystemVerilog implicit handles; DRAM capacitor patterning.


Arm’s Andrew Pickard chats with Georgia Tech’s Azad Naeemi and Da Eun Shim about an effort to evaluate the benefit of new interconnect materials and wire geometry and determine their impacts at the microprocessor level.

Synopsys’ Shekhar Kapoor shares highlights from a recent panel exploring the promises, challenges, and realities of 3D IC technology, including the potential of 3D nanosystems and why ecosystem collaboration is so important.

Siemens’ Chris Spear digs further into class members in SystemVerilog with a look at how to further enhance code using the implicit handles ‘this’ and ‘super.’

Cadence’s Paul McLellan provides a brief primer on the RISC-V ISA and the options for turning it into a processor.

Coventor’s QingPeng Wang explains how virtual fabrication can be used during process window evaluation of a DRAM capacitor patterning process to overcome limited availability of wafer test data.

Ansys’ Hong Chassan argues that automotive manufacturers need to quickly ramp up ISO 26262 requirement-based analysis and testing to continuously update semiconductor chip designs supporting numerous automotive safety domains.

SEMI’s Pushkar P. Apte and UC Berkeley’s Costas Spanos argue that for business to see significant benefits from AI, data-driven initiatives must be coupled with a scientific or intuitive understanding of the physical world.

Intel’s Jakob Engblom introduces the public release of the Simics simulator, along with the open-source release of the Device Modeling Language (DML), a domain-specific language for creating fast functional transaction-level virtual platform models.

Memory analyst Jim Handy considers the impact Kioxia’s recently-announced plan to cut NAND flash wafer production by 30% could have on the current NAND flash price decline.

Western Digital’s Ronni Shendar shares the history of the SD card and its evolution from MMC through a collaboration between SanDisk, Toshiba, and Panasonic.

For a change from reading, watch some recent videos:

Longer chip lifetimes mean they need to adapt to security threats, which can mean Using eFPGAs For Security.

Why Quantum Computing has taken so long to materialize, and what’s still missing.

Access IP information quickly over longer chip and package lifetimes by Boosting Data Management System Performance.

Co-Packaged Optics In The Data Center can help minimize energy and improve performance as Ethernet speeds increase.

Deep Learning In Industrial Inspection is helpful for finding defects.

Considerations and fixes for hardware attacks are needed in Protecting ICs Against Specific Threats.

Transforming AI Models For Accelerator Chips shows why floating point data needs to be converted into integer point data.

Reducing data bubbles in domain-specific designs for Zero Dark Silicon.

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