The Growing Imperative Of Hardware Security Assurance In IP And SoC Design
By Pavani Jella - 24 Oct, 2024 - Comments: 0

In an era where technology permeates every aspect of our lives, the semiconductor industry serves as the backbone of innovation. From IoT devices to data centers, every piece of technology relies on integrated circuits (ICs) such as intellectual property (IP) cores and system on chips (SoCs). As these technologies become increasingly pervasive, the importance of hardware security assurance in t... » read more

Overview Of The Current State of the Development Of Curvilinear Masks
By D2S - 24 Oct, 2024 - Comments: 0

A technical paper titled "Curvilinear masks overview: manufacturable mask shapes are more reliably manufacturable" was published by researchers at D2S. The paper covers: The rationale for curvilinear masks The application of the curvilinear inverse lithography technology The state of readiness of the curvilinear mask-making infrastructure, including mask rule checking, metrology, ... » read more

Monolithic Vs. Heterogeneous Integration
By Ed Sperling - 24 Oct, 2024 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss two very different paths forward for semiconductors and what's needed for each, with Jamie Schaeffer, vice president of product management at GlobalFoundries; Dechao Guo, director of advanced logic technology R&D at IBM; Dave Thompson, vice president at Intel; Mustafa Badaroglu, principal engineer at Qualcomm; and Thomas Po... » read more

Current and Emerging Heterogeneous Integration Technologies For High-Performance Systems (Georgia Tech)
By Technical Paper Link - 23 Oct, 2024 - Comments: 0

A technical paper titled "Heterogeneous Integration Technologies for Artificial Intelligence Applications" was published by Georgia Tech. Abstract "The rapid advancement of artificial intelligence (AI) has been enabled by semiconductor-based electronics. However, the conventional methods of transistor scaling are not enough to meet the exponential demand for computing power driven by AI. ... » read more

Overview Of Security Verification Methodologies for SoC Designs Pre-Silicon (U. of Florida)
By Technical Paper Link - 23 Oct, 2024 - Comments: 0

A technical paper titled "A Survey on SoC Security Verification Methods at the Pre-silicon Stage" was recently published by researchers at University of Florida. Abstract "This paper presents a survey of the state-of-the-art pre-silicon security verification techniques for System-on-Chip (SoC) designs, focusing on ensuring that designs, implemented in hardware description languages (HDLs) a... » read more

Characterizing Defects Inside Hexagonal Boron Nitride (KAIST, NYU, et al.)
By Technical Paper Link - 23 Oct, 2024 - Comments: 0

A new technical paper titled "Characterizing Defects Inside Hexagonal Boron Nitride Using Random Telegraph Signals in van der Waals 2D Transistors" was published by researchers at KAIST, NYU, Brookhaven National Laboratory, and National Institute for Materials Science. Abstract: "Single-crystal hexagonal boron nitride (hBN) is used extensively in many two-dimensional electronic and quantu... » read more

New Approach to Encoding Optical Weights for In-Memory Photonic Computing Using Magneto-Optic Memory Cells
By Technical Paper Link - 23 Oct, 2024 - Comments: 0

A new technical paper titled "Integrated non-reciprocal magneto-optics with ultra-high endurance for photonic in-memory computing" was published by researchers at UC Santa Barbara, University of Cagliari, University of Pittsburgh, AIST and Tokyo Institute of Technology. Abstract "Processing information in the optical domain promises advantages in both speed and energy efficiency over existi... » read more

Americas Chip Funding Energizes Industry
By Liz Allan - 23 Oct, 2024 - Comments: 0

This is the second in a series of articles tracking government chip investments. See part one here. Part 3 and 4 of the series will cover Europe and Asia. Since the first announcement of a non-binding preliminary memorandum of terms with BAE Systems in December 2023, the U.S. Department of Commerce has rolled out comprehensive plans to support more than a dozen companies in order to shore up... » read more

Blog Review: Oct. 23
By Jesse Allen - 23 Oct, 2024 - Comments: 0

Cadence’s Sanjeet Kumar introduces the message bus interface in the PHY Interface for the PCIe, SATA, USB, DisplayPort, and USB4 Architectures (PIPE) specification, which provides a way to initiate and participate in non-latency-sensitive PIPE operations using a small number of wires. Siemens’ Dennis Brophy argues that the recently published Portable Test and Stimulus Standard (PSS) 3.0 ... » read more

Scalability of Nanosheet Oxide FETs for Monolithic 3-D Integration
By Technical Paper Link - 22 Oct, 2024 - Comments: 0

A new technical paper titled "High-Field Transport and Statistical Variability of Nanosheet Oxide Semiconductor FETs With Channel Length Scaling" was published by researchers at The University of Tokyo and Nara Institute of Science and Technology. Abstract "We have investigated the scaling potential of nanosheet oxide semiconductor FETs (NS OS FETs) for monolithic 3-D (M3D) integration in t... » read more

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