Cutting IC Manufacturing Costs By Combining Data


Experts at the Table: Semiconductor Engineering sat down to discuss the benefits of incorporating financial data into fab floor decision-making, including what kind of cost data is most useful, with Dieter Rathei, CEO of DR Yield; Jon Holt, senior director of product management at PDF Solutions, Alex Burlak, vice president of advanced analytics and test at proteanTecs; and Dirk de Vries, techni... » read more

Reversible Chain Diagnosis


For advanced technologies, the industry is seeing very complicated silicon defect types and defect distribution. One consequence is that scan chain diagnosis becomes more difficult. To improve the resolution of scan chain diagnosis, Tessent Diagnosis can use new scan chain test patterns to leverage a reversible scan chain architecture. This paper describes the novel scan chain architecture t... » read more

Silicon Photonics Raises New Test Challenges


Semiconductor devices continuously experience advancements leading to technology and innovation leaps, such as we see today for applications in AI high-performance computing for data centers, edge AI devices, electric vehicles, autonomous driving, mobile phones, and others. Recent technology innovations include Angstrom-scale semiconductor processing nodes, high-bandwidth memory, advanced 2.5D/... » read more

AI Semiconductors Require An Integrated Test Solution


The rapid proliferation of generative pre-trained transformers based on large language models (LLMs) is driving growth in the market for chips that can run the LLMs and other artificial intelligence (AI) and machine learning (ML) applications. Several types of chips hold promise for accelerating AI computing. Graphical processing units (GPUs) have proven to be capable solutions for the server/c... » read more

Failure To Launch


Failure analysis (FA) is an essential step for achieving sufficient yield in semiconductor manufacturing, but it’s struggling to keep pace with smaller dimensions, advanced packaging, and new power delivery architectures. All of these developments make defects harder to find and more expensive to fix, which impacts the reliability of chips and systems. Traditional failure analysis techniqu... » read more

Full-Chip Voltage Contrast Inference Using Deep Learning; You Only Look Once: Voltage Contrast (YOLO-VC)


Abstract: The electron beam inspection methodology for voltage contrast (VC) defects has been widely adopted in the early stages of sub-10nm logic and memory technology development, as well as in new product introductions. However, due to throughput limitations, full-chip inspection at the 300mm wafer scale remains impractical for yield ramp and production applications. To address this challeng... » read more

Chip Industry Technical Paper Roundup: Mar. 10


New technical papers recently added to Semiconductor Engineering’s library: [table id=412 /] Find more semiconductor research papers here. » read more

Research Bits: Mar. 10


Incipient ferroelectricity Researchers from Penn State University and the University of Minnesota propose harnessing incipient ferroelectricity in multifunctional two-dimensional FETs to create neuromorphic computer memory. Materials with incipient ferroelectricity have no stable ferroelectric order at room temperature and need certain conditions to achieve an electrical charge. The FETs were ... » read more

Thermally Aware Chiplet Placement Algorithm Based on Automatic Differentiation (MIT, IBM)


A new technical paper titled "DiffChip: Thermally Aware Chip Placement with Automatic Differentiation" was published by researchers at MIT and IBM. Abstract "Chiplets are modular integrated circuits that can be combined to form a larger system, offering flexibility and performance enhancements. However, their dense packing often leads to significant thermal management challenges, requiring ... » read more

4D mmWave Radar-Based Road Boundary Detection System


A new technical paper titled "Road Boundary Detection Using 4D mmWave Radar for Autonomous Driving" was published by Stanford University. Abstract "Detecting road boundaries, the static physical edges of the available driving area, is important for safe navigation and effective path planning in autonomous driving and advanced driver-assistance systems (ADAS). Traditionally, road boundary de... » read more

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