Who Will Own Debug?
By Hagai Arbel - 09 Mar, 2022 - Comments: 0

Recently, I had an interesting conversation with a verification leader of one of the world’s leading semiconductors companies. He has some 150 verification engineers in his organization and the group has been exploring EDA solutions for many years. While we’ve exchanged many ideas about EDA and innovation, one sentence that he said stays in my head: Whoever will own debug, will own th... » read more

Blog Review: March 9
By Jesse Allen - 09 Mar, 2022 - Comments: 0

Arm's Ajay Joshi investigates how to select the right benchmark for CPUs used in the Home device market, such as digital television and set-top box/over-the-top devices. Ansys' Jon Kordell checks out how reliability physics simulations and physical component characterization can support component swapping in high-reliability applications when the original part is unavailable due to supply ch... » read more

Advancing Electric Vehicle Battery Characterization By Integrating Drive Cycle On Cooling Impacts
By Ansys - 09 Mar, 2022 - Comments: 0

Battery powered electric vehicles (EVs) and hybrid electric vehicles (HEVs) have been gaining market share as the public’s environmental concerns drive the demand for better fuel efficiency. Apart from the need to improve the mileage one can drive before recharging, battery reliability is another major concern. Effective cooling in intense charge/discharge conditions is crucial to minimizi... » read more

Navigating The Intersection Of Safety And Security
By Siemens EDA - 09 Mar, 2022 - Comments: 0

Vehicle systems and the semiconductors used within them are some of the most complex electronics seen today. In the past, electronics going into vehicle systems implemented flat architectures with isolated functions controlling various components of the power train and vehicle dynamics. However, to support the realization of Level 4 and Level 5 (L4/L5) autonomous driving, a massive restructure ... » read more

A Framework For Ultra Low-Power Hardware Accelerators Using NNs For Embedded Time Series Classification
By Fraunhofer IIS/EAS - 09 Mar, 2022 - Comments: 0

In embedded applications that use neural networks (NNs) for classification tasks, it is important to not only minimize the power consumption of the NN calculation, but of the whole system. Optimization approaches for individual parts exist, such as quantization of the NN or analog calculation of arithmetic operations. However, there is no holistic approach for a complete embedded system design ... » read more

Pinpointing the Dominant Component of Contact Resistance to Atomically Thin Semiconductors
By Technical Paper Link - 08 Mar, 2022 - Comments: 0

Abstract "Achieving good electrical contacts is one of the major challenges in realizing devices based on atomically thin two-dimensional (2D) semiconductors. Several studies have examined this hurdle, but a universal understanding of the contact resistance and an underlying approach to its reduction are currently lacking. In this work we expose the shortcomings of the classical contact resist... » read more

SparseP: Towards Efficient Sparse Matrix Vector Multiplication on Real Processing-In-Memory Systems
By Technical Paper Link - 08 Mar, 2022 - Comments: 0

Abstract "Several manufacturers have already started to commercialize near-bank Processing-In-Memory (PIM) architectures. Near-bank PIM architectures place simple cores close to DRAM banks and can yield significant performance and energy improvements in parallel applications by alleviating data access costs. Real PIM systems can provide high levels of parallelism, large aggregate memory bandwi... » read more

Zero-Bias Power-Detector Circuits based on MoS2 Field-Effect Transistors on Wafer-Scale Flexible Substrates
By Technical Paper Link - 08 Mar, 2022 - Comments: 0

Abstract: "We demonstrate the design, fabrication, and characterization of wafer-scale, zero-bias power detectors based on two-dimensional MoS2 field effect transistors (FETs). The MoS2 FETs are fabricated using a wafer-scale process on 8 μm thick polyimide film, which in principle serves as flexible substrate. The performances of two CVD-MoS2 sheets, grown with different processes and showi... » read more

Digital Twin for Secure Semiconductor Lifecycle Management: Prospects and Applications
By Technical Paper Link - 08 Mar, 2022 - Comments: 0

Abstract:  "The expansive globalization of the semiconductor supply chain has introduced numerous untrusted entities into different stages of a device’s lifecycle, enabling them to compromise its security. To make matters worse, the increasing complexity in the design as well as aggressive time-to-market requirements of the newer generation of integrated circuits can lead either designers t... » read more

Advances in Logic Locking: Past, Present, and Prospects
By Technical Paper Link - 08 Mar, 2022 - Comments: 0

Abstract: "Logic locking is a design concealment mechanism for protecting the IPs integrated into modern System-on-Chip (SoC) architectures from a wide range of hardware security threats at the IC manufacturing supply chain. Logic locking primarily helps the designer to protect the IPs against reverse engineering, IP piracy, overproduction, and unauthorized activation. For more than a decade,... » read more

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