Gaps In The AI Debug Process
By Brian Bailey - 23 Nov, 2021 - Comments: 0

When an AI algorithm is deployed in the field and gives an unexpected result, it's often not clear whether that result is correct. So what happened? Was it wrong? And if so, what caused the error? These are often not simple questions to answer. Moreover, as with all verification problems, the only way to get to the root cause is to break the problem down into manageable pieces. The semico... » read more

Towards Decarbonization: Keeping Electronics Energy Consumption In Check
By Frank Schirrmeister - 23 Nov, 2021 - Comments: 0

The International Technology Roadmap for Semiconductors (ITRS) roadmap famously said in 2001 that "cost of design is the greatest threat to the continuation of the semiconductor roadmap." For years, the industry followed the ITRS updates on productivity improvements provided by automating design and hardware to counteract the looming design cost. The discussion on decarbonization has some simil... » read more

Eliminating Software Development Bottlenecks For SoCs
By Sam Tennent - 23 Nov, 2021 - Comments: 0

System on chip (SoC) devices, by definition, use a combination of hardware and embedded software to provide their specified functionality. Both the design and programming teams face many challenges and have huge tasks. No matter how well they may perform, the full system cannot be verified and validated until the hardware and software are brought together in the bring-up lab. This is usually wa... » read more

Improving Predictability Through Design Solutions Methodologies
By Rusty Stuber - 23 Nov, 2021 - Comments: 0

“Plans are useless, but planning is indispensable.” – Dwight D. Eisenhower Our first article called for the need to change how we think about verification. In this follow-up, we dive deeper into the tools needed for today’s verification. Project milestones are destined to move. Development estimates are rough and almost always optimistic. Each development stage contains interdepe... » read more

Raising The Bar With The Next Generation Of AI For Chip Design
By Synopsys - 22 Nov, 2021 - Comments: 0

The semiconductor industry is enjoying renewed growth despite chip shortages plaguing everything from cars to kitchen appliances. But while the chips themselves continue to get faster and smarter, the chip design process itself hasn’t changed that much in 20+ years. It typically takes 2-3 years to design a chip with a large engineering team and tens or hundreds of millions of dollars to get a... » read more

Batch Filters: A Better, Faster Way To Filter Large DRC Results Databases
By Siemens EDA - 22 Nov, 2021 - Comments: 0

Reviewing massive DRC results databases (RDBs) can be a time-consuming stage in traditional debug flows, due primarily to the loading, filtering, and display times associated with these large datasets. Finding the most effective approach to filtering results data is important to optimize both results debug time and resource usage. While smaller databases that load quickly in GUI applications ca... » read more

Achieving Success In Automotive Leadframe Packages
By John Nickelsen - 22 Nov, 2021 - Comments: 0

The growth of semiconductor content in automotive applications has been accelerating. This growth drives all families of semiconductor packaging in all regions. The growth is happening in the latest advanced, laminate-based packages using flip chip interconnect as well as the venerable leadframe packages using wirebond interconnect. The automotive market consumes micro-electromechanical systems... » read more

Chip Design Teams And Restaurant Kitchen Staff Have A Lot In Common
By Cliosoft - 22 Nov, 2021 - Comments: 0

By Anagha Pandharpurkar Believe it or not, electronic device and systems-design teams have a lot in common with kitchen staff in big commercial restaurants: They both leverage many different tools and resources to churn out great products in a high-pressure environment to a demanding audience that wants it now, not tomorrow. Unfortunately, design teams are often not nearly as well equippe... » read more

Interop Shift Left: Using Pre-Silicon Simulation for Emerging Standards
By Cadence - 22 Nov, 2021 - Comments: 0

The Compute Express Link (CXL) 2.0 specification, released in 2020, accompanies the latest PCI Express (PCIe) 5.0 specification to provide a path to high-bandwidth, cache-coherent, low-latency transport for many high-bandwidth applications such as artificial intelligence, machine learning, and hyperscale applications, with specific use cases in newer memory architectures such as disaggregated a... » read more

China Accelerates Foundry, Power Semi Efforts
By Mark LaPedus - 22 Nov, 2021 - Comments: 4

China has unveiled several initiatives to advance its domestic semiconductor industry, including a new and massive fab expansion campaign in the foundry, gallium-nitride (GaN), and silicon carbide (SiC) markets. The nation is making a big push into what it calls “third-generation semiconductors,” which is a misnomer. The term actually refers to two existing and common power semiconductor... » read more

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