Chasing Test Escapes In IC Manufacturing


The number of bad chips that slip through testing and end up in the field can be significantly reduced before those devices ever leave the fab, but the cost of developing the necessary tests and analyzing the data has sharply limited adoption. Determining an acceptable test escape metric for an IC is essential to improving the yield-to-quality ratio in chip manufacturing, but what exactly is... » read more

Cryostats Enable Astrophysics Research


Imagine designing and building two prototype HPD cryostats for the Submillimeter Array on Maunakea in Hawaii. The SMA is a collaborative project between the Smithsonian Astrophysical Observatory (SAO, a member of the Center for Astrophysics | Harvard & Smithsonian) and the Academia Sinica Institute of Astronomy and Astrophysics. The SMA consists of eight radio telescopes operating fro... » read more

Acoustic Metrology for Fine Pitch Microbumps in 3D IC


The continuing shift to 3D integration requires formation of electrical interconnects between multiple vertically stacked Si devices to enable high speed, high bandwidth connections. Microbumps and through silicon vias (TSVs) enable the high-density interconnects for die-to-die and die-to-wafer stacking for different applications. In this paper, we present acoustic metrology techniques for the ... » read more

FPGA Prototyping: Supersizing Scale And Performance


Given the cost of re-spinning a system-on-chip (SoC), semiconductor companies have always looked for ways to verify and validate the SoC before tape-out. Prototyping using field programmable gate arrays (FPGAs) became a key methodology as part of this pre-silicon verification and validation effort. Click here to read more. » read more

A Novel Memory Test System With An Electromagnet For STT-MRAM Testing


We have successfully developed, for the first time, a new memory test system for STT-MRAM at wafer-level where an electromagnet is combined with a memory test system and a 300 mm wafer prober. In the developed memory test system, an out-of-plane magnetic field up to ±800 mT can be applied on 10 x 10 mm2 in the 300 mm wafer with distribution of less than 2.5%. We demonstrated that the electroma... » read more

Manufacturing Bits: May 10


Synaptic transistors The University of Hong Kong and Northwestern University have developed an organic electrochemical synaptic transistor, a technology that could one day process and store information like the human brain. Researchers have demonstrated that the transistor can mimic the synapses in the human brain. It can build on memories to learn over time, according to researchers. Th... » read more

Standards, Open Source, and Tools


Experts at the Table: Semiconductor Engineering discussed what open source verification means today and what it should evolve into with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Ashish Darbari, CEO of Axiomise; Simon Davidmann, CEO of Imperas Software; Serge Leef, program manager in the Microsystems Technology Office at DARPA; Tao Liu, staff hardware engineer... » read more

Power/Performance Bits: May 10


Probabilistic bit Researchers at Tohoku University are working on building probabilistic computers by developing a spintronics-based probabilistic bit (p-bit). The researchers utilized magnetic tunnel junctions (MTJs). Most commonly used in MRAM technology, where thermal fluctuation typically poses a threat to the stable storage of information, in this case it was a benefit. The p-bits f... » read more

Week In Review: Manufacturing, Test


Chipmakers and OEMs IBM has unveiled what the company says is the world’s first 2nm chip. The device is based on a next-generation transistor architecture called a nanosheet FET. The nanosheet FET is an evolutionary step from finFETs, which is today’s state-of-the-art transistor technology. Targeted for 2024, IBM’s 2nm chip features a novel multi-Vt scheme, a 12nm gate length, and a n... » read more

Week In Review: Design, Low Power


Synopsys completed its acquisition of MorethanIP, a provider of Ethernet Digital Controller IP supporting data rates from 10G to 800G. The acquisition adds MAC (Medium Access Controller) and PCS (Physical Coding Sublayer) for 200G/400G and 800G Ethernet to Synopsys’ portfolio. The company also provides Time-Sensitive Networking, Fibre Channel, and Ethernet Switching IP for integration into AS... » read more

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