Current Knowledge & Future Development In 2D Magnetic Materials Research
By Technical Paper Link - 26 Apr, 2022 - Comments: 0

Abstract: "Magnetism in two-dimensional (2D) van der Waals (vdW) materials has recently emerged as one of the most promising areas in condensed matter research, with many exciting emerging properties and significant potential for applications ranging from topological magnonics to low-power spintronics, quantum computing, and optical communications. In the brief time after their discovery, 2D... » read more

Pyrolyzed Cellulose Nanofiber Paper (CNP) Semiconductor with a 3D Network Structure
By Technical Paper Link - 26 Apr, 2022 - Comments: 0

Abstract Semiconducting nanomaterials with 3D network structures exhibit various fascinating properties such as electrical conduction, high permeability, and large surface areas, which are beneficial for adsorption, separation, and sensing applications. However, research on these materials is substantially restricted by the limited trans-scalability of their structural design and tunability of... » read more

Technical Paper Round-up: April 26
By Linda Christensen - 26 Apr, 2022 - Comments: 0

Find all technical papers in Semiconductor Engineering’s library. [table id=23 /]   Semiconductor Engineering is in the process of building this library of research papers.  Please send suggestions for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a ... » read more

Research Bits: April 26
By Jesse Allen - 26 Apr, 2022 - Comments: 0

Photonic quantum computers Researchers from Stanford University propose a simpler design method for photonic quantum computers. The proposed design uses a laser to manipulate a single atom that, in turn, can modify the state of the photons via a phenomenon called “quantum teleportation.” The atom can be reset and reused for many quantum gates, eliminating the need to build multiple distinc... » read more

Artificial intelligence deep learning for 3D IC reliability prediction
By Technical Paper Link - 25 Apr, 2022 - Comments: 0

New research from National Yang Ming Chiao Tung University, National Center for High-Performance Computing (Taiwan), Tunghai University, MA-Tek Inc, and UCLA. Abstract "Three-dimensional integrated circuit (3D IC) technologies have been receiving much attention recently due to the near-ending of Moore’s law of minimization in 2D IC. However, the reliability of 3D IC, which is greatly infl... » read more

Efficacy of Transistor Interleaving in DICE Flip-Flops at a 22 nm FD SOI Technology Node
By Technical Paper Link - 25 Apr, 2022 - Comments: 0

New research paper from University of Saskatchewan, with funding by NSERC and the Cisco University Research Program. Abstract "Fully Depleted Silicon on Insulator (FD SOI) technology nodes provide better resistance to single event upsets than comparable bulk technologies, but upsets are still likely to occur at nano-scale feature sizes, and additional hardening techniques should be explor... » read more

Using GPUs In Semiconductor Manufacturing
By Ed Sperling - 25 Apr, 2022 - Comments: 0

Massive simulation and curvilinear shapes are forcing the photomask industry to rethink what types of chips work best. Aki Fujimura, CEO of D2S, talks about what happens when shapes printed on a mask are closer to what actually gets printed, how GPUs can be used to accelerate CPUs in single instruction/multiple data (SIMD) operations, and why pixel data is different from other data. » read more

Paving The Way To Chiplets
By Mark LaPedus - 25 Apr, 2022 - Comments: 2

The packaging industry is putting pieces in place to broaden the adoption of chiplets beyond just a few chip vendors, setting the stage for next-generation 3D chip designs and packages. New chiplet standards, and a cost analysis tool for determining the feasibility of a given chiplet-based design, are two new and important pieces. Along with other efforts, the goal is to propel the chiplet m... » read more

BEOL Integration For The 1.5nm Node And Beyond
By Assawer Soussou - 25 Apr, 2022 - Comments: 0

As we approach the 1.5nm node and beyond, new BEOL device integration challenges will be presented. These challenges include the need for smaller metal pitches, along with support for new process flows. Process modifications to improve RC performance, reduce edge placement error, and enable challenging manufacturing processes will all be required. To address these challenges, we investigated th... » read more

Hardware-Supported Patching of Security Bugs in Hardware IP Blocks
By Technical Paper Link - 22 Apr, 2022 - Comments: 0

New research paper from Duke University, University of Calgary, NYU & Intel. Abstract: "To satisfy various design requirements and application needs, designers integrate multiple Intellectual Property blocks (IPs) to produce a system-on-chip (SoC). For improved survivability, designers should be able to patch the SoC to mitigate potential security issues arising from hardware IPs; for incre... » read more

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